[PATCH] D148834: [RISCV][InsertVSETVLI] Avoid VL toggles for extractelement patterns
    Roger Ferrer Ibanez via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed May 10 23:23:56 PDT 2023
    
    
  
rogfer01 added a comment.
In D148834#4334213 <https://reviews.llvm.org/D148834#4334213>, @rogfer01 wrote:
> In D148834#4333386 <https://reviews.llvm.org/D148834#4333386>, @reames wrote:
>
>> In D148834#4331814 <https://reviews.llvm.org/D148834#4331814>, @rogfer01 wrote:
>>
>>> Can anyone else reproduce this?
>>
>> I think this is now fixed, but my cross build environment for test-suite is a giant collection of hacks.  Confirmation that this now works end to end would be appreciated.
>
> Thanks a lot @reames, I'll check ASAP.
Confirmed these two tests are now back to green. Thanks again for the prompt fix @reames.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148834/new/
https://reviews.llvm.org/D148834
    
    
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