[PATCH] D149711: [PowerPC] Remove asserts from the disassembler.
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 10 19:58:05 PDT 2023
shchenz added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp:118
const MCDisassembler *Decoder) {
- assert(RegNo <= 30 && "Expecting a register number no more than 30.");
- assert((RegNo & 1) == 0 && "Expecting an even register number.");
return decodeRegisterClass(Inst, RegNo >> 1, FpRegs);
}
----------------
Little confused. From the function name and its parameter seems like this function should only be called for instructions. Is it possible that there is a wrong call to this function? For example, for data, we should not decode fpr RC as there is no RC for data at all?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149711/new/
https://reviews.llvm.org/D149711
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