[llvm] 9a35c0c - [AIX] enable enable OrcCAPITest, NFC

[Chen Zheng via llvm-commits]

Author: Chen Zheng
Date: 2023-05-10T22:38:29-04:00
New Revision: 9a35c0cb452ae403c9a19a7e02f273c62e77304a

URL: https://github.com/llvm/llvm-project/commit/9a35c0cb452ae403c9a19a7e02f273c62e77304a
DIFF: https://github.com/llvm/llvm-project/commit/9a35c0cb452ae403c9a19a7e02f273c62e77304a.diff

LOG: [AIX] enable enable OrcCAPITest, NFC

After enhancement for XCOFF integrated assembler mode, now OrcCAPITest
can be enabled on AIX.

Differential Revision: https://reviews.llvm.org/D148325

Added: 
    

Modified: 
    llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp b/llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
index e00ff7cee01b3..cbdd4af47e1d4 100644
--- a/llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
+++ b/llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
@@ -122,9 +122,6 @@ class OrcCAPITestBase : public testing::Test {
     // some may just be failing due to bugs in this testcase.
     if (Triple.startswith("armv7") || Triple.startswith("armv8l"))
       return false;
-    llvm::Triple T(Triple);
-    if (T.isOSAIX() && T.isPPC64())
-      return false;
     return true;
   }
 
@@ -425,7 +422,11 @@ TEST_F(OrcCAPITestBase, DefinitionGenerators) {
   ASSERT_EQ(ExpectedAddr, OutAddr);
 }
 
+#if defined(_AIX)
+TEST_F(OrcCAPITestBase, DISABLED_ResourceTrackerDefinitionLifetime) {
+#else
 TEST_F(OrcCAPITestBase, ResourceTrackerDefinitionLifetime) {
+#endif
   // This test case ensures that all symbols loaded into a JITDylib with a
   // ResourceTracker attached are cleared from the JITDylib once the RT is
   // removed.
@@ -450,7 +451,11 @@ TEST_F(OrcCAPITestBase, ResourceTrackerDefinitionLifetime) {
   LLVMOrcReleaseResourceTracker(RT);
 }
 
+#if defined(_AIX)
+TEST_F(OrcCAPITestBase, DISABLED_ResourceTrackerTransfer) {
+#else
 TEST_F(OrcCAPITestBase, ResourceTrackerTransfer) {
+#endif
   LLVMOrcResourceTrackerRef DefaultRT =
       LLVMOrcJITDylibGetDefaultResourceTracker(MainDylib);
   LLVMOrcResourceTrackerRef RT2 =
@@ -469,7 +474,11 @@ TEST_F(OrcCAPITestBase, ResourceTrackerTransfer) {
   LLVMOrcReleaseResourceTracker(RT2);
 }
 
+#if defined(_AIX)
+TEST_F(OrcCAPITestBase, DISABLED_AddObjectBuffer) {
+#else
 TEST_F(OrcCAPITestBase, AddObjectBuffer) {
+#endif
   LLVMOrcObjectLayerRef ObjLinkingLayer = LLVMOrcLLJITGetObjLinkingLayer(Jit);
   LLVMMemoryBufferRef ObjBuffer = createTestObject(SumExample, "sum.ll");
 
@@ -485,7 +494,11 @@ TEST_F(OrcCAPITestBase, AddObjectBuffer) {
   ASSERT_TRUE(!!SumAddr);
 }
 
+#if defined(_AIX)
+TEST_F(OrcCAPITestBase, DISABLED_ExecutionTest) {
+#else
 TEST_F(OrcCAPITestBase, ExecutionTest) {
+#endif
   using SumFunctionType = int32_t (*)(int32_t, int32_t);
 
   // This test performs OrcJIT compilation of a simple sum module