[llvm] becfcdf - [Verifier] Allow DW_OP_LLVM_entry_value in IR

[Felipe de Azevedo Piovezan via llvm-commits]

Author: Felipe de Azevedo Piovezan
Date: 2023-05-10T14:35:04-04:00
New Revision: becfcdfc811b6e89bb59f0521d69332985e3550b

URL: https://github.com/llvm/llvm-project/commit/becfcdfc811b6e89bb59f0521d69332985e3550b
DIFF: https://github.com/llvm/llvm-project/commit/becfcdfc811b6e89bb59f0521d69332985e3550b.diff

LOG: [Verifier] Allow DW_OP_LLVM_entry_value in IR

A follow up patch will make the CoroSplit pass introduce such operations in the
IR level when it is safe to do so.

Depends on D149748

Differential Revision: https://reviews.llvm.org/D149778

Added: 
    

Modified: 
    llvm/docs/LangRef.rst
    llvm/lib/IR/Verifier.cpp
    llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll

Removed: 
    


################################################################################
diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 55802b007ac3e..c00fea32eff41 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -1364,6 +1364,8 @@ Currently, only the following parameter attributes are defined:
     a valid attribute for return values and can only be applied to one
     parameter.
 
+.. _swiftasync:
+
 ``swiftasync``
     This indicates that the parameter is the asynchronous context parameter and
     triggers the creation of a target-specific extended frame record to store
@@ -6005,7 +6007,8 @@ The current supported opcode vocabulary is limited:
   instruction.
 
   Because ``DW_OP_LLVM_entry_value`` is defined in terms of registers, it is
-  only allowed in MIR. The operation is introduced by:
+  usually used in MIR, but it is also allowed in LLVM IR when targetting a
+  :ref:`_swiftasync` argument. The operation is introduced by:
 
     - ``LiveDebugValues`` pass, which applies it to function parameters that
       are unmodified throughout the function. Support is limited to simple

diff  --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index e67283e3fb577..ef3ba220f8ba0 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -6339,7 +6339,17 @@ void Verifier::verifyNotEntryValue(const DbgVariableIntrinsic &I) {
   if (!E || !E->isValid())
     return;
 
-  CheckDI(!E->isEntryValue(), "Entry values are only allowed in MIR", &I);
+  // We allow EntryValues for swift async arguments, as they have an
+  // ABI-guarantee to be turned into a specific register.
+  if (isa<ValueAsMetadata>(I.getRawLocation()))
+    if (auto *ArgLoc = dyn_cast_or_null<Argument>(I.getVariableLocationOp(0));
+        ArgLoc && ArgLoc->hasAttribute(Attribute::SwiftAsync))
+      return;
+
+  CheckDI(!E->isEntryValue(),
+          "Entry values are only allowed in MIR unless they target a "
+          "swiftasync Argument",
+          &I);
 }
 
 void Verifier::verifyCompileUnits() {

diff  --git a/llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll b/llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
index 99143297acf44..484e6713761cd 100644
--- a/llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
+++ b/llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
@@ -1,14 +1,14 @@
 ; RUN: llvm-as -disable-output <%s 2>&1| FileCheck %s
 
-; The DW_OP_LLVM_entry_value operation can only be used in MIR.
-
-; CHECK: Entry values are only allowed in MIR
+; CHECK: Entry values are only allowed in MIR unless they target a swiftasync Argument
 ; CHECK: call void @llvm.dbg.value(metadata i32 %param, metadata !{{.*}}, metadata !DIExpression(DW_OP_LLVM_entry_value, 1))
+; CHECK-NOT: llvm.dbg.value
 ; CHECK: warning: ignoring invalid debug info
 
-define void @foo(i32 %param) !dbg !4 {
+define void @foo(i32 %param, ptr swiftasync %ok_param) !dbg !4 {
 entry:
   call void @llvm.dbg.value(metadata i32 %param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
+  call void @llvm.dbg.value(metadata ptr %ok_param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
   ret void
 }