[PATCH] D150238: [RISCV][NFC] Remove LMUL from vmv.s.x and vmv.x.s scheduler classes

[Nitin John Raj via Phabricator via llvm-commits]

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These instructions don't read or write register groups. We only pretend they do in intrinsics and pseudoinstructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150238

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVScheduleV.td

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