[PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction

ShihPo Hung via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 9 01:52:25 PDT 2023


arcbbb added a comment.

In D121376#4327781 <https://reviews.llvm.org/D121376#4327781>, @zvookin wrote:

> What is the status of this? Is it moving forward? So far as I can tell, there still is no solution other than inline assembly to set vxrm from LLVM IR.

There is a change in RISCV psABI so that VXRM/VXSAT is volatile across calls now. [1]
And the corresponding C intrinsic API is going to be updated based on this ABI change. [2]
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/294
[2] https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/157


Repository:
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  https://reviews.llvm.org/D121376/new/

https://reviews.llvm.org/D121376



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