[PATCH] D140975: Support critical edge splitting for jump tables

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:3242
+  //   %1 = MOVSX64rm32 %0, 4, XX, 0, $noreg
+  //   %2 = ADD64rr %1, %0
+  //   JMP64r %2
----------------
MatzeB wrote:
> craig.topper wrote:
> > I'm not sure I understand this code. The MOVSXrm32 is loading from %0, sign extending it, and then adds what it loaded also to %0?
> This is how clang generates the code. I mention it here as a reminder for the pattern the code below is searching for.
> 
> If you look at the assembly of an example compiled with `-fPIC` you see that the entries in the table record the basic block address relative to the beginning of the jump table. Hence we first need to load from the table and in a 2nd step add the base address of the table to get the final address.
> 
> I see something like this for small examples:
> ```
>    ...
>    leaq    .LJTI0_0(%rip), %rax
>    movslq  (%rax,%rdi,4), %rcx
>    addq    %rax, %rcx
>    jmpq    *%rcx
> .LBB0_2:
>    ...
> .LBB0_3:
>    ...
> ...
> 
> ...
> 
> .LJTI0_0:
>    .long   .LBB0_2-.LJTI0_0
>    .long   .LBB0_3-.LJTI0_0
>    ...
> ```
Thanks for the explanation.


Repository:
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  https://reviews.llvm.org/D140975/new/

https://reviews.llvm.org/D140975