[PATCH] D150143: [X86] Add X86FixupVectorConstantsPass to fold vectors constant loads as broadcasts (WIP)

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added a comment.

> The principal aim is to prevent the premature creation of broadcasts that prevent us folding the loads with another instruction, helping to reduce register pressure.

There are two other problems we have with constant generation that it might also be nice to address with a new pass but that I don't think this approach will be
able to handle.

1. There are a variety of cases where we could get "better" constants by re-ordering instructions which is very difficult to do at any stage in the current DAG lowering

process without creating an infinite loop, but is also something that would be very difficult to do after lowering at the machineinstruction level. I tried to do this for 
`shl; and` in D141653 <https://reviews.llvm.org/D141653> but it ran into an infinite loop when I did more robust testing, and we could imagine also doing it for vector-compares, add/sub, etc...

2. There are constants like `splat(1)`, `splat(mask)`, `splat(-mask)` which can often be preferable to build without a load at all (`abs(ALL_ONES)`, `shr(ALL_ONES)`,

`shl(ALL_ONES)`), especially if the fairly common `ALL_ONES` node dominates.

I think both of these goal lend themselves to a pass before DAG lowering has been completed, but after the common transforms/optimizations.
I was thinking a pass in `CodeGenAndEmitDAG` after the fourth post-legalization `Combine` but before `DoInstructionSelection` would make the
most sense for fixing up constant generation (including the aims of this patch).


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https://reviews.llvm.org/D150143