[llvm] 455cb2e - [RISCV] Simplify matchRegisterNameHelper interface. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-05-08T09:48:08-07:00
New Revision: 455cb2e57883b7360b427cb413b990448ab13190

URL: https://github.com/llvm/llvm-project/commit/455cb2e57883b7360b427cb413b990448ab13190
DIFF: https://github.com/llvm/llvm-project/commit/455cb2e57883b7360b427cb413b990448ab13190.diff

LOG: [RISCV] Simplify matchRegisterNameHelper interface. NFC

This previously returned a bool to indicate success or failure and
returns a register through an output parameter.

Some callers used the bool to check for success. Some callers checked
for RISCV::NoRegister.

To make everything uniform, return the MCRegister directly and update
all callers to use MCRegister::isValid().

Reviewed By: barannikov88

Differential Revision: https://reviews.llvm.org/D150049

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e676b54597a55..8562473845f2c 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1512,23 +1512,22 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
 
 // Attempts to match Name as a register (either using the default name or
 // alternative ABI names), setting RegNo to the matching register. Upon
-// failure, returns true and sets RegNo to 0. If IsRVE then registers
-// x16-x31 will be rejected.
-static bool matchRegisterNameHelper(bool IsRVE, MCRegister &RegNo,
-                                    StringRef Name) {
-  RegNo = MatchRegisterName(Name);
+// failure, returns a non-valid MCRegister. If IsRVE, then registers x16-x31
+// will be rejected.
+static MCRegister matchRegisterNameHelper(bool IsRVE, StringRef Name) {
+  MCRegister Reg = MatchRegisterName(Name);
   // The 16-/32- and 64-bit FPRs have the same asm name. Check that the initial
   // match always matches the 64-bit variant, and not the 16/32-bit one.
-  assert(!(RegNo >= RISCV::F0_H && RegNo <= RISCV::F31_H));
-  assert(!(RegNo >= RISCV::F0_F && RegNo <= RISCV::F31_F));
+  assert(!(Reg >= RISCV::F0_H && Reg <= RISCV::F31_H));
+  assert(!(Reg >= RISCV::F0_F && Reg <= RISCV::F31_F));
   // The default FPR register class is based on the tablegen enum ordering.
   static_assert(RISCV::F0_D < RISCV::F0_H, "FPR matching must be updated");
   static_assert(RISCV::F0_D < RISCV::F0_F, "FPR matching must be updated");
-  if (RegNo == RISCV::NoRegister)
-    RegNo = MatchRegisterAltName(Name);
-  if (IsRVE && RegNo >= RISCV::X16 && RegNo <= RISCV::X31)
-    RegNo = RISCV::NoRegister;
-  return RegNo == RISCV::NoRegister;
+  if (!Reg)
+    Reg = MatchRegisterAltName(Name);
+  if (IsRVE && Reg >= RISCV::X16 && Reg <= RISCV::X31)
+    Reg = RISCV::NoRegister;
+  return Reg;
 }
 
 bool RISCVAsmParser::parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
@@ -1544,10 +1543,10 @@ OperandMatchResultTy RISCVAsmParser::tryParseRegister(MCRegister &RegNo,
   const AsmToken &Tok = getParser().getTok();
   StartLoc = Tok.getLoc();
   EndLoc = Tok.getEndLoc();
-  RegNo = 0;
   StringRef Name = getLexer().getTok().getIdentifier();
 
-  if (matchRegisterNameHelper(isRVE(), (MCRegister &)RegNo, Name))
+  RegNo = matchRegisterNameHelper(isRVE(), Name);
+  if (!RegNo)
     return MatchOperand_NoMatch;
 
   getParser().Lex(); // Eat identifier token.
@@ -1579,10 +1578,9 @@ OperandMatchResultTy RISCVAsmParser::parseRegister(OperandVector &Operands,
     return MatchOperand_NoMatch;
   case AsmToken::Identifier:
     StringRef Name = getLexer().getTok().getIdentifier();
-    MCRegister RegNo;
-    matchRegisterNameHelper(isRVE(), RegNo, Name);
+    MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
 
-    if (RegNo == RISCV::NoRegister) {
+    if (!RegNo) {
       if (HadParens)
         getLexer().UnLex(LParen);
       return MatchOperand_NoMatch;
@@ -2121,10 +2119,9 @@ OperandMatchResultTy RISCVAsmParser::parseMaskReg(OperandVector &Operands) {
     Error(getLoc(), "expected '.t' suffix");
     return MatchOperand_ParseFail;
   }
-  MCRegister RegNo;
-  matchRegisterNameHelper(isRVE(), RegNo, Name);
+  MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
 
-  if (RegNo == RISCV::NoRegister)
+  if (!RegNo)
     return MatchOperand_NoMatch;
   if (RegNo != RISCV::V0)
     return MatchOperand_NoMatch;
@@ -2140,10 +2137,9 @@ OperandMatchResultTy RISCVAsmParser::parseGPRAsFPR(OperandVector &Operands) {
     return MatchOperand_NoMatch;
 
   StringRef Name = getLexer().getTok().getIdentifier();
-  MCRegister RegNo;
-  matchRegisterNameHelper(isRVE(), RegNo, Name);
+  MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
 
-  if (RegNo == RISCV::NoRegister)
+  if (!RegNo)
     return MatchOperand_NoMatch;
   SMLoc S = getLoc();
   SMLoc E = SMLoc::getFromPointer(S.getPointer() + Name.size());
@@ -2325,10 +2321,9 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
   getLexer().Lex(); // eat '{'
   bool IsEABI = isRVE();
 
-  MCRegister RegStart = RISCV::NoRegister;
-  MCRegister RegEnd = RISCV::NoRegister;
   StringRef RegName = getLexer().getTok().getIdentifier();
-  matchRegisterNameHelper(IsEABI, RegStart, RegName);
+  MCRegister RegStart = matchRegisterNameHelper(IsEABI, RegName);
+  MCRegister RegEnd;
   if (RegStart != RISCV::X1) {
     Error(getLoc(), "register list must start from 'ra' or 'x1'");
     return MatchOperand_ParseFail;
@@ -2343,7 +2338,8 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
       return MatchOperand_ParseFail;
     }
     StringRef RegName = getLexer().getTok().getIdentifier();
-    if (matchRegisterNameHelper(IsEABI, RegStart, RegName)) {
+    RegStart = matchRegisterNameHelper(IsEABI, RegName);
+    if (!RegStart) {
       Error(getLoc(), "invalid register");
       return MatchOperand_ParseFail;
     }
@@ -2359,7 +2355,8 @@ OperandMatchResultTy RISCVAsmParser::parseReglist(OperandVector &Operands) {
     getLexer().Lex();
     StringRef EndName = getLexer().getTok().getIdentifier();
     // FIXME: the register mapping and checks of EABI is wrong
-    if (matchRegisterNameHelper(IsEABI, RegEnd, EndName)) {
+    RegEnd = matchRegisterNameHelper(IsEABI, EndName);
+    if (!RegEnd) {
       Error(getLoc(), "invalid register");
       return MatchOperand_ParseFail;
     }