[PATCH] D150002: [AMDGPU] Fix crash with 160-bit p7's by manually defining getPointerTy

[Krzysztof Drewniak via Phabricator via llvm-commits]

krzysz00 updated this revision to Diff 520400.
krzysz00 edited the summary of this revision.
krzysz00 added a comment.

Move to MVT::v5i32, sacrificing the ability to handle vectors of p7 in codegen but being more correct otherwise.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150002/new/

https://reviews.llvm.org/D150002

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
  llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll

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