[llvm] 7cba800 - [CodeGen] Autogen tests as prerequisite for D42600
via llvm-commits
llvm-commits at lists.llvm.org
Sun May 7 23:57:47 PDT 2023
Author: sgokhale
Date: 2023-05-08T12:25:51+05:30
New Revision: 7cba80010445e7111d6c22d8405b2e26ba4540f4
URL: https://github.com/llvm/llvm-project/commit/7cba80010445e7111d6c22d8405b2e26ba4540f4
DIFF: https://github.com/llvm/llvm-project/commit/7cba80010445e7111d6c22d8405b2e26ba4540f4.diff
LOG: [CodeGen] Autogen tests as prerequisite for D42600
Autogenerating tests as suggested in D42600
Added:
Modified:
llvm/test/CodeGen/AArch64/ragreedy-csr.ll
llvm/test/CodeGen/PowerPC/shrink-wrap.ll
llvm/test/CodeGen/PowerPC/shrink-wrap.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/ragreedy-csr.ll b/llvm/test/CodeGen/AArch64/ragreedy-csr.ll
index e5c1d1a04a99e..98c95c38bbb6b 100644
--- a/llvm/test/CodeGen/AArch64/ragreedy-csr.ll
+++ b/llvm/test/CodeGen/AArch64/ragreedy-csr.ll
@@ -1,24 +1,10 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -regalloc=greedy -regalloc-csr-first-time-cost=15 | FileCheck %s
; This testing case is reduced from 197.parser prune_match function.
; We make sure that we do not use callee-saved registers (x19 to x25).
; rdar://16162005
-; CHECK-LABEL: prune_match:
-; CHECK: entry
-; CHECK: {{str x30|stp x29, x30}}, [sp
-; CHECK-NOT: stp x25,
-; CHECK-NOT: stp x23, x24
-; CHECK-NOT: stp x21, x22
-; CHECK-NOT: stp x19, x20
-; CHECK: if.end
-; CHECK: return
-; CHECK: {{ldr x30|ldp x29, x30}}, [sp
-; CHECK-NOT: ldp x19, x20
-; CHECK-NOT: ldp x21, x22
-; CHECK-NOT: ldp x23, x24
-; CHECK-NOT: ldp x25,
-
%struct.List_o_links_struct = type { i32, i32, i32, ptr }
%struct.Connector_struct = type { i16, i16, i8, i8, ptr, ptr }
%struct._RuneLocale = type { [8 x i8], [32 x i8], ptr, ptr, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, ptr, i32, i32, ptr }
@@ -33,6 +19,249 @@
@_DefaultRuneLocale = external global %struct._RuneLocale
declare i32 @__maskrune(i32, i64) #7
define fastcc i32 @prune_match(ptr nocapture readonly %a, ptr nocapture readonly %b) #9 {
+; CHECK-LABEL: prune_match:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: sub sp, sp, #64
+; CHECK-NEXT: .cfi_def_cfa_offset 64
+; CHECK-NEXT: stp x29, x30, [sp, #48] ; 16-byte Folded Spill
+; CHECK-NEXT: .cfi_offset w30, -8
+; CHECK-NEXT: .cfi_offset w29, -16
+; CHECK-NEXT: ldrh w8, [x0]
+; CHECK-NEXT: ldrh w9, [x1]
+; CHECK-NEXT: cmp w8, w9
+; CHECK-NEXT: b.ne LBB0_42
+; CHECK-NEXT: ; %bb.1: ; %if.end
+; CHECK-NEXT: Lloh0:
+; CHECK-NEXT: adrp x14, __DefaultRuneLocale at GOTPAGE
+; CHECK-NEXT: mov x9, xzr
+; CHECK-NEXT: ldrb w12, [x0, #4]
+; CHECK-NEXT: ldrb w13, [x1, #4]
+; CHECK-NEXT: ldr x10, [x0, #16]
+; CHECK-NEXT: ldr x11, [x1, #16]
+; CHECK-NEXT: Lloh1:
+; CHECK-NEXT: ldr x14, [x14, __DefaultRuneLocale at GOTPAGEOFF]
+; CHECK-NEXT: ldrsb x8, [x10, x9]
+; CHECK-NEXT: tbz x8, #63, LBB0_3
+; CHECK-NEXT: LBB0_2: ; %cond.false.i.i
+; CHECK-NEXT: stp x9, x0, [sp, #32] ; 16-byte Folded Spill
+; CHECK-NEXT: mov w0, w8
+; CHECK-NEXT: mov w1, #32768 ; =0x8000
+; CHECK-NEXT: str x10, [sp, #8] ; 8-byte Folded Spill
+; CHECK-NEXT: str x11, [sp, #24] ; 8-byte Folded Spill
+; CHECK-NEXT: str w12, [sp, #4] ; 4-byte Folded Spill
+; CHECK-NEXT: str w13, [sp, #20] ; 4-byte Folded Spill
+; CHECK-NEXT: bl ___maskrune
+; CHECK-NEXT: Lloh2:
+; CHECK-NEXT: adrp x14, __DefaultRuneLocale at GOTPAGE
+; CHECK-NEXT: mov w8, w0
+; CHECK-NEXT: Lloh3:
+; CHECK-NEXT: ldr x14, [x14, __DefaultRuneLocale at GOTPAGEOFF]
+; CHECK-NEXT: ldp x11, x9, [sp, #24] ; 16-byte Folded Reload
+; CHECK-NEXT: ldr w13, [sp, #20] ; 4-byte Folded Reload
+; CHECK-NEXT: ldr w12, [sp, #4] ; 4-byte Folded Reload
+; CHECK-NEXT: ldr x10, [sp, #8] ; 8-byte Folded Reload
+; CHECK-NEXT: ldr x0, [sp, #40] ; 8-byte Folded Reload
+; CHECK-NEXT: cbz w8, LBB0_4
+; CHECK-NEXT: b LBB0_6
+; CHECK-NEXT: LBB0_3: ; %cond.true.i.i
+; CHECK-NEXT: add x8, x14, x8, lsl #2
+; CHECK-NEXT: ldr w8, [x8, #60]
+; CHECK-NEXT: and w8, w8, #0x8000
+; CHECK-NEXT: cbnz w8, LBB0_6
+; CHECK-NEXT: LBB0_4: ; %lor.rhs
+; CHECK-NEXT: ldrsb x8, [x11, x9]
+; CHECK-NEXT: tbnz x8, #63, LBB0_8
+; CHECK-NEXT: ; %bb.5: ; %cond.true.i.i217
+; CHECK-NEXT: add x8, x14, x8, lsl #2
+; CHECK-NEXT: ldr w8, [x8, #60]
+; CHECK-NEXT: and w8, w8, #0x8000
+; CHECK-NEXT: cbz w8, LBB0_9
+; CHECK-NEXT: LBB0_6: ; %while.body
+; CHECK-NEXT: ldrb w8, [x10, x9]
+; CHECK-NEXT: ldrb w15, [x11, x9]
+; CHECK-NEXT: cmp w8, w15
+; CHECK-NEXT: b.ne LBB0_42
+; CHECK-NEXT: ; %bb.7: ; %if.end17
+; CHECK-NEXT: add x9, x9, #1
+; CHECK-NEXT: ldrsb x8, [x10, x9]
+; CHECK-NEXT: tbz x8, #63, LBB0_3
+; CHECK-NEXT: b LBB0_2
+; CHECK-NEXT: LBB0_8: ; %cond.false.i.i219
+; CHECK-NEXT: stp x9, x0, [sp, #32] ; 16-byte Folded Spill
+; CHECK-NEXT: mov w0, w8
+; CHECK-NEXT: mov w1, #32768 ; =0x8000
+; CHECK-NEXT: str x10, [sp, #8] ; 8-byte Folded Spill
+; CHECK-NEXT: str x11, [sp, #24] ; 8-byte Folded Spill
+; CHECK-NEXT: str w12, [sp, #4] ; 4-byte Folded Spill
+; CHECK-NEXT: str w13, [sp, #20] ; 4-byte Folded Spill
+; CHECK-NEXT: bl ___maskrune
+; CHECK-NEXT: Lloh4:
+; CHECK-NEXT: adrp x14, __DefaultRuneLocale at GOTPAGE
+; CHECK-NEXT: mov w8, w0
+; CHECK-NEXT: Lloh5:
+; CHECK-NEXT: ldr x14, [x14, __DefaultRuneLocale at GOTPAGEOFF]
+; CHECK-NEXT: ldp x11, x9, [sp, #24] ; 16-byte Folded Reload
+; CHECK-NEXT: ldr w13, [sp, #20] ; 4-byte Folded Reload
+; CHECK-NEXT: ldr w12, [sp, #4] ; 4-byte Folded Reload
+; CHECK-NEXT: ldr x10, [sp, #8] ; 8-byte Folded Reload
+; CHECK-NEXT: ldr x0, [sp, #40] ; 8-byte Folded Reload
+; CHECK-NEXT: cbnz w8, LBB0_6
+; CHECK-NEXT: LBB0_9: ; %while.end
+; CHECK-NEXT: orr w8, w13, w12
+; CHECK-NEXT: cbnz w8, LBB0_24
+; CHECK-NEXT: ; %bb.10: ; %if.then23
+; CHECK-NEXT: ldr x12, [x0, #16]
+; CHECK-NEXT: ldrb w8, [x10, x9]
+; CHECK-NEXT: ldrb w13, [x12]
+; CHECK-NEXT: cmp w13, #83
+; CHECK-NEXT: b.eq LBB0_19
+; CHECK-NEXT: LBB0_11: ; %while.cond59.preheader
+; CHECK-NEXT: cbz w8, LBB0_23
+; CHECK-NEXT: LBB0_12: ; %land.rhs.preheader
+; CHECK-NEXT: add x10, x10, x9
+; CHECK-NEXT: add x9, x11, x9
+; CHECK-NEXT: add x10, x10, #1
+; CHECK-NEXT: LBB0_13: ; %land.rhs
+; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldrb w11, [x9], #1
+; CHECK-NEXT: cbz w11, LBB0_23
+; CHECK-NEXT: ; %bb.14: ; %while.body66
+; CHECK-NEXT: ; in Loop: Header=BB0_13 Depth=1
+; CHECK-NEXT: cmp w8, #42
+; CHECK-NEXT: b.eq LBB0_18
+; CHECK-NEXT: ; %bb.15: ; %while.body66
+; CHECK-NEXT: ; in Loop: Header=BB0_13 Depth=1
+; CHECK-NEXT: cmp w11, #42
+; CHECK-NEXT: b.eq LBB0_18
+; CHECK-NEXT: ; %bb.16: ; %lor.lhs.false74
+; CHECK-NEXT: ; in Loop: Header=BB0_13 Depth=1
+; CHECK-NEXT: mov w0, wzr
+; CHECK-NEXT: cmp w8, w11
+; CHECK-NEXT: b.ne LBB0_43
+; CHECK-NEXT: ; %bb.17: ; %lor.lhs.false74
+; CHECK-NEXT: ; in Loop: Header=BB0_13 Depth=1
+; CHECK-NEXT: cmp w8, #94
+; CHECK-NEXT: b.eq LBB0_43
+; CHECK-NEXT: LBB0_18: ; %if.then83
+; CHECK-NEXT: ; in Loop: Header=BB0_13 Depth=1
+; CHECK-NEXT: ldrb w8, [x10], #1
+; CHECK-NEXT: mov w0, #1 ; =0x1
+; CHECK-NEXT: cbnz w8, LBB0_13
+; CHECK-NEXT: b LBB0_43
+; CHECK-NEXT: LBB0_19: ; %land.lhs.true28
+; CHECK-NEXT: cbz w8, LBB0_23
+; CHECK-NEXT: ; %bb.20: ; %land.lhs.true28
+; CHECK-NEXT: cmp w8, #112
+; CHECK-NEXT: b.ne LBB0_12
+; CHECK-NEXT: ; %bb.21: ; %land.lhs.true35
+; CHECK-NEXT: ldrb w13, [x11, x9]
+; CHECK-NEXT: cmp w13, #112
+; CHECK-NEXT: b.ne LBB0_12
+; CHECK-NEXT: ; %bb.22: ; %land.lhs.true43
+; CHECK-NEXT: sub x12, x10, x12
+; CHECK-NEXT: add x12, x12, x9
+; CHECK-NEXT: cmp x12, #1
+; CHECK-NEXT: b.ne LBB0_44
+; CHECK-NEXT: LBB0_23:
+; CHECK-NEXT: mov w0, #1 ; =0x1
+; CHECK-NEXT: b LBB0_43
+; CHECK-NEXT: LBB0_24: ; %if.else88
+; CHECK-NEXT: cmp w12, #1
+; CHECK-NEXT: b.ne LBB0_33
+; CHECK-NEXT: ; %bb.25: ; %if.else88
+; CHECK-NEXT: cmp w13, #2
+; CHECK-NEXT: b.ne LBB0_33
+; CHECK-NEXT: ; %bb.26: ; %while.cond95.preheader
+; CHECK-NEXT: ldrb w12, [x10, x9]
+; CHECK-NEXT: cbz w12, LBB0_23
+; CHECK-NEXT: ; %bb.27: ; %land.rhs99.preheader
+; CHECK-NEXT: mov x8, xzr
+; CHECK-NEXT: mov w0, #1 ; =0x1
+; CHECK-NEXT: b LBB0_29
+; CHECK-NEXT: LBB0_28: ; %if.then117
+; CHECK-NEXT: ; in Loop: Header=BB0_29 Depth=1
+; CHECK-NEXT: add x12, x10, x8
+; CHECK-NEXT: add x8, x8, #1
+; CHECK-NEXT: add x12, x12, x9
+; CHECK-NEXT: ldrb w12, [x12, #1]
+; CHECK-NEXT: cbz w12, LBB0_43
+; CHECK-NEXT: LBB0_29: ; %land.rhs99
+; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: add x13, x11, x8
+; CHECK-NEXT: ldrb w13, [x13, x9]
+; CHECK-NEXT: cbz w13, LBB0_23
+; CHECK-NEXT: ; %bb.30: ; %while.body104
+; CHECK-NEXT: ; in Loop: Header=BB0_29 Depth=1
+; CHECK-NEXT: cmp w12, w13
+; CHECK-NEXT: b.eq LBB0_28
+; CHECK-NEXT: ; %bb.31: ; %while.body104
+; CHECK-NEXT: ; in Loop: Header=BB0_29 Depth=1
+; CHECK-NEXT: cmp w12, #42
+; CHECK-NEXT: b.eq LBB0_28
+; CHECK-NEXT: ; %bb.32: ; %while.body104
+; CHECK-NEXT: ; in Loop: Header=BB0_29 Depth=1
+; CHECK-NEXT: cmp w13, #94
+; CHECK-NEXT: b.eq LBB0_28
+; CHECK-NEXT: b LBB0_42
+; CHECK-NEXT: LBB0_33: ; %if.else123
+; CHECK-NEXT: mov w0, wzr
+; CHECK-NEXT: cmp w13, #1
+; CHECK-NEXT: b.ne LBB0_43
+; CHECK-NEXT: ; %bb.34: ; %if.else123
+; CHECK-NEXT: cmp w12, #2
+; CHECK-NEXT: b.ne LBB0_43
+; CHECK-NEXT: ; %bb.35: ; %while.cond130.preheader
+; CHECK-NEXT: ldrb w8, [x10, x9]
+; CHECK-NEXT: cbz w8, LBB0_23
+; CHECK-NEXT: ; %bb.36: ; %land.rhs134.preheader
+; CHECK-NEXT: mov x12, xzr
+; CHECK-NEXT: mov w0, #1 ; =0x1
+; CHECK-NEXT: b LBB0_38
+; CHECK-NEXT: LBB0_37: ; %if.then152
+; CHECK-NEXT: ; in Loop: Header=BB0_38 Depth=1
+; CHECK-NEXT: add x8, x10, x12
+; CHECK-NEXT: add x12, x12, #1
+; CHECK-NEXT: add x8, x8, x9
+; CHECK-NEXT: ldrb w8, [x8, #1]
+; CHECK-NEXT: cbz w8, LBB0_43
+; CHECK-NEXT: LBB0_38: ; %land.rhs134
+; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: add x13, x11, x12
+; CHECK-NEXT: ldrb w13, [x13, x9]
+; CHECK-NEXT: cbz w13, LBB0_23
+; CHECK-NEXT: ; %bb.39: ; %while.body139
+; CHECK-NEXT: ; in Loop: Header=BB0_38 Depth=1
+; CHECK-NEXT: cmp w8, w13
+; CHECK-NEXT: b.eq LBB0_37
+; CHECK-NEXT: ; %bb.40: ; %while.body139
+; CHECK-NEXT: ; in Loop: Header=BB0_38 Depth=1
+; CHECK-NEXT: cmp w13, #42
+; CHECK-NEXT: b.eq LBB0_37
+; CHECK-NEXT: ; %bb.41: ; %while.body139
+; CHECK-NEXT: ; in Loop: Header=BB0_38 Depth=1
+; CHECK-NEXT: cmp w8, #94
+; CHECK-NEXT: b.eq LBB0_37
+; CHECK-NEXT: LBB0_42:
+; CHECK-NEXT: mov w0, wzr
+; CHECK-NEXT: LBB0_43: ; %return
+; CHECK-NEXT: ldp x29, x30, [sp, #48] ; 16-byte Folded Reload
+; CHECK-NEXT: add sp, sp, #64
+; CHECK-NEXT: ret
+; CHECK-NEXT: LBB0_44: ; %lor.lhs.false47
+; CHECK-NEXT: cmp x12, #2
+; CHECK-NEXT: b.ne LBB0_11
+; CHECK-NEXT: ; %bb.45: ; %land.lhs.true52
+; CHECK-NEXT: add x12, x10, x9
+; CHECK-NEXT: mov w0, #1 ; =0x1
+; CHECK-NEXT: ldurb w12, [x12, #-1]
+; CHECK-NEXT: cmp w12, #73
+; CHECK-NEXT: b.eq LBB0_43
+; CHECK-NEXT: ; %bb.46: ; %land.lhs.true52
+; CHECK-NEXT: cbz w8, LBB0_43
+; CHECK-NEXT: b LBB0_12
+; CHECK-NEXT: .loh AdrpLdrGot Lloh0, Lloh1
+; CHECK-NEXT: .loh AdrpLdrGot Lloh2, Lloh3
+; CHECK-NEXT: .loh AdrpLdrGot Lloh4, Lloh5
entry:
%0 = load i16, ptr %a, align 2
%1 = load i16, ptr %b, align 2
diff --git a/llvm/test/CodeGen/PowerPC/shrink-wrap.ll b/llvm/test/CodeGen/PowerPC/shrink-wrap.ll
index 98fa21c359054..08c391e34c6f4 100644
--- a/llvm/test/CodeGen/PowerPC/shrink-wrap.ll
+++ b/llvm/test/CodeGen/PowerPC/shrink-wrap.ll
@@ -1,8 +1,185 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s --check-prefixes=CHECK,CHECK64
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECK,CHECK32
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECKAIX,CHECK64
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s --check-prefixes=POWERPC64
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=POWERPC32-AIX
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=POWERPC64-AIX
define signext i32 @shrinkwrapme(i32 signext %a, i32 signext %lim) {
+; POWERPC64-LABEL: shrinkwrapme:
+; POWERPC64: # %bb.0: # %entry
+; POWERPC64-NEXT: cmpwi 4, 0
+; POWERPC64-NEXT: std 14, -144(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 15, -136(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 16, -128(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 17, -120(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 18, -112(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 19, -104(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 20, -96(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 21, -88(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 22, -80(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 23, -72(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 24, -64(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 25, -56(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 26, -48(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 27, -40(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 28, -32(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 29, -24(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 30, -16(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: std 31, -8(1) # 8-byte Folded Spill
+; POWERPC64-NEXT: ble 0, .LBB0_3
+; POWERPC64-NEXT: # %bb.1: # %for.body.preheader
+; POWERPC64-NEXT: addi 4, 4, -1
+; POWERPC64-NEXT: clrldi 4, 4, 32
+; POWERPC64-NEXT: addi 4, 4, 1
+; POWERPC64-NEXT: mtctr 4
+; POWERPC64-NEXT: li 4, 0
+; POWERPC64-NEXT: .p2align 4
+; POWERPC64-NEXT: .LBB0_2: # %for.body
+; POWERPC64-NEXT: #
+; POWERPC64-NEXT: #APP
+; POWERPC64-NEXT: add 4, 3, 4
+; POWERPC64-NEXT: #NO_APP
+; POWERPC64-NEXT: bdnz .LBB0_2
+; POWERPC64-NEXT: b .LBB0_4
+; POWERPC64-NEXT: .LBB0_3:
+; POWERPC64-NEXT: li 4, 0
+; POWERPC64-NEXT: .LBB0_4: # %for.cond.cleanup
+; POWERPC64-NEXT: ld 31, -8(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 30, -16(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 29, -24(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 28, -32(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: extsw 3, 4
+; POWERPC64-NEXT: ld 27, -40(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 26, -48(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 25, -56(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 24, -64(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 23, -72(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 22, -80(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 21, -88(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 20, -96(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 19, -104(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 18, -112(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 17, -120(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 16, -128(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 15, -136(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: ld 14, -144(1) # 8-byte Folded Reload
+; POWERPC64-NEXT: blr
+;
+; POWERPC32-AIX-LABEL: shrinkwrapme:
+; POWERPC32-AIX: # %bb.0: # %entry
+; POWERPC32-AIX-NEXT: cmpwi 4, 0
+; POWERPC32-AIX-NEXT: stw 14, -72(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 15, -68(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 16, -64(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 17, -60(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 18, -56(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 19, -52(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 20, -48(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 21, -44(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 22, -40(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 23, -36(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 24, -32(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 25, -28(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 26, -24(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 27, -20(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 28, -16(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 29, -12(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 30, -8(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: stw 31, -4(1) # 4-byte Folded Spill
+; POWERPC32-AIX-NEXT: ble 0, L..BB0_3
+; POWERPC32-AIX-NEXT: # %bb.1: # %for.body.preheader
+; POWERPC32-AIX-NEXT: mtctr 4
+; POWERPC32-AIX-NEXT: li 4, 0
+; POWERPC32-AIX-NEXT: .align 4
+; POWERPC32-AIX-NEXT: L..BB0_2: # %for.body
+; POWERPC32-AIX-NEXT: #
+; POWERPC32-AIX-NEXT: #APP
+; POWERPC32-AIX-NEXT: add 4, 3, 4
+; POWERPC32-AIX-NEXT: #NO_APP
+; POWERPC32-AIX-NEXT: bdnz L..BB0_2
+; POWERPC32-AIX-NEXT: b L..BB0_4
+; POWERPC32-AIX-NEXT: L..BB0_3:
+; POWERPC32-AIX-NEXT: li 4, 0
+; POWERPC32-AIX-NEXT: L..BB0_4: # %for.cond.cleanup
+; POWERPC32-AIX-NEXT: lwz 31, -4(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 30, -8(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 29, -12(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 28, -16(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: mr 3, 4
+; POWERPC32-AIX-NEXT: lwz 27, -20(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 26, -24(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 25, -28(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 24, -32(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 23, -36(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 22, -40(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 21, -44(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 20, -48(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 19, -52(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 18, -56(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 17, -60(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 16, -64(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 15, -68(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: lwz 14, -72(1) # 4-byte Folded Reload
+; POWERPC32-AIX-NEXT: blr
+;
+; POWERPC64-AIX-LABEL: shrinkwrapme:
+; POWERPC64-AIX: # %bb.0: # %entry
+; POWERPC64-AIX-NEXT: cmpwi 4, 1
+; POWERPC64-AIX-NEXT: std 14, -144(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 15, -136(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 16, -128(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 17, -120(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 18, -112(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 19, -104(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 20, -96(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 21, -88(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 22, -80(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 23, -72(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 24, -64(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 25, -56(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 26, -48(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 27, -40(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 28, -32(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 29, -24(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 30, -16(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: std 31, -8(1) # 8-byte Folded Spill
+; POWERPC64-AIX-NEXT: blt 0, L..BB0_3
+; POWERPC64-AIX-NEXT: # %bb.1: # %for.body.preheader
+; POWERPC64-AIX-NEXT: addi 4, 4, -1
+; POWERPC64-AIX-NEXT: clrldi 4, 4, 32
+; POWERPC64-AIX-NEXT: addi 4, 4, 1
+; POWERPC64-AIX-NEXT: mtctr 4
+; POWERPC64-AIX-NEXT: li 4, 0
+; POWERPC64-AIX-NEXT: .align 4
+; POWERPC64-AIX-NEXT: L..BB0_2: # %for.body
+; POWERPC64-AIX-NEXT: #
+; POWERPC64-AIX-NEXT: #APP
+; POWERPC64-AIX-NEXT: add 4, 3, 4
+; POWERPC64-AIX-NEXT: #NO_APP
+; POWERPC64-AIX-NEXT: bdnz L..BB0_2
+; POWERPC64-AIX-NEXT: b L..BB0_4
+; POWERPC64-AIX-NEXT: L..BB0_3:
+; POWERPC64-AIX-NEXT: li 4, 0
+; POWERPC64-AIX-NEXT: L..BB0_4: # %for.cond.cleanup
+; POWERPC64-AIX-NEXT: ld 31, -8(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 30, -16(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 29, -24(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 28, -32(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: extsw 3, 4
+; POWERPC64-AIX-NEXT: ld 27, -40(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 26, -48(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 25, -56(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 24, -64(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 23, -72(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 22, -80(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 21, -88(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 20, -96(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 19, -104(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 18, -112(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 17, -120(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 16, -128(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 15, -136(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: ld 14, -144(1) # 8-byte Folded Reload
+; POWERPC64-AIX-NEXT: blr
entry:
%cmp5 = icmp sgt i32 %lim, 0
br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
@@ -24,31 +201,4 @@ entry:
%inc = add nuw nsw i32 %i.07, 1
%exitcond = icmp eq i32 %inc, %lim
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
-
-; CHECK-LABEL: {{[\.]?}}shrinkwrapme:
-; CHECK: # %bb.0:
-; CHECK-NEXT: cmpwi
-; Prolog code
-; CHECK64-COUNT-18: std
-
-; CHECK32-COUNT-18: stw
-
-; CHECK: ble 0, {{.*}}BB0_3
-; CHECKAIX: blt 0, {{.*}}BB0_3
-; CHECK: # %bb.1:
-; CHECK: li
-; CHECK: {{.*}}BB0_2:
-; CHECK: add
-; CHECK: bdnz {{.*}}BB0_2
-; CHECK-NEXT: b {{.*}}BB0_4
-; CHECK: {{.*}}BB0_3:
-; CHECK-NEXT: li
-; CHECK: {{.*}}BB0_4:
-
-; Epilog code
-; CHECK64-COUNT-18: ld
-;
-; CHECK32-COUNT-18: lwz
-
-; CHECK: blr
}
diff --git a/llvm/test/CodeGen/PowerPC/shrink-wrap.mir b/llvm/test/CodeGen/PowerPC/shrink-wrap.mir
index f0540adad4937..1b6ccb92527e7 100644
--- a/llvm/test/CodeGen/PowerPC/shrink-wrap.mir
+++ b/llvm/test/CodeGen/PowerPC/shrink-wrap.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple powerpc64le-unknown-linux-gnu \
# RUN: -run-pass=shrink-wrap -o - %s | FileCheck %s
# RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple powerpc-ibm-aix-xcoff \
@@ -84,6 +85,44 @@ callSites: []
constants: []
machineFunctionInfo: {}
body: |
+ ; CHECK-LABEL: name: shrinkwrapme
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: successors: %bb.2(0x50000000), %bb.1(0x30000000)
+ ; CHECK-NEXT: liveins: $x3, $x4
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $cr0 = CMPWI renamable $r4, 1
+ ; CHECK-NEXT: BCC 4, killed renamable $cr0, %bb.2
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r4 = LI 0
+ ; CHECK-NEXT: B %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2.for.body.preheader:
+ ; CHECK-NEXT: successors: %bb.4(0x80000000)
+ ; CHECK-NEXT: liveins: $x3, $x4
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r4 = ADDI renamable $r4, -1, implicit killed $x4, implicit-def $x4
+ ; CHECK-NEXT: renamable $x4 = RLDICL killed renamable $x4, 0, 32
+ ; CHECK-NEXT: renamable $x4 = nuw nsw ADDI8 killed renamable $x4, 1
+ ; CHECK-NEXT: MTCTR8loop killed renamable $x4, implicit-def dead $ctr8
+ ; CHECK-NEXT: renamable $r4 = LI 0
+ ; CHECK-NEXT: B %bb.4
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3.for.cond.cleanup:
+ ; CHECK-NEXT: liveins: $r4
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $x3 = EXTSW_32_64 killed renamable $r4
+ ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4.for.body:
+ ; CHECK-NEXT: successors: %bb.4(0x7c000000), %bb.3(0x04000000)
+ ; CHECK-NEXT: liveins: $r4, $x3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: INLINEASM &"add $0, $1, $2", 0 /* attdialect */, 131082 /* regdef:GPRC */, def renamable $r4, 131081 /* reguse:GPRC */, renamable $r3, 131081 /* reguse:GPRC */, killed renamable $r4, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15, 12 /* clobber */, implicit-def dead early-clobber $r16, 12 /* clobber */, implicit-def dead early-clobber $r17, 12 /* clobber */, implicit-def dead early-clobber $r18, 12 /* clobber */, implicit-def dead early-clobber $r19, 12 /* clobber */, implicit-def dead early-clobber $r20, 12 /* clobber */, implicit-def dead early-clobber $r21, 12 /* clobber */, implicit-def dead early-clobber $r22, 12 /* clobber */, implicit-def dead early-clobber $r23, 12 /* clobber */, implicit-def dead early-clobber $r24, 12 /* clobber */, implicit-def dead early-clobber $r25, 12 /* clobber */, implicit-def dead early-clobber $r26, 12 /* clobber */, implicit-def dead early-clobber $r27, 12 /* clobber */, implicit-def dead early-clobber $r28, 12 /* clobber */, implicit-def dead early-clobber $r29, 12 /* clobber */, implicit-def dead early-clobber $r30, 12 /* clobber */, implicit-def dead early-clobber $r31
+ ; CHECK-NEXT: BDNZ8 %bb.4, implicit-def dead $ctr8, implicit $ctr8
+ ; CHECK-NEXT: B %bb.3
bb.0.entry:
successors: %bb.2(0x50000000), %bb.1(0x30000000)
liveins: $x3, $x4
@@ -121,14 +160,4 @@ body: |
INLINEASM &"add $0, $1, $2", 0, 131082, def renamable $r4, 131081, renamable $r3, 131081, killed renamable $r4, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15, 12, implicit-def dead early-clobber $r16, 12, implicit-def dead early-clobber $r17, 12, implicit-def dead early-clobber $r18, 12, implicit-def dead early-clobber $r19, 12, implicit-def dead early-clobber $r20, 12, implicit-def dead early-clobber $r21, 12, implicit-def dead early-clobber $r22, 12, implicit-def dead early-clobber $r23, 12, implicit-def dead early-clobber $r24, 12, implicit-def dead early-clobber $r25, 12, implicit-def dead early-clobber $r26, 12, implicit-def dead early-clobber $r27, 12, implicit-def dead early-clobber $r28, 12, implicit-def dead early-clobber $r29, 12, implicit-def dead early-clobber $r30, 12, implicit-def dead early-clobber $r31
BDNZ8 %bb.4, implicit-def dead $ctr8, implicit $ctr8
B %bb.3
-
- ; CHECK: savePoint: ''
- ; CHECK-NEXT: restorePoint: ''
-
- ; CHECK: bb.4.for.body:
- ; CHECK-NEXT: successors: %bb.4(0x7c000000), %bb.3(0x04000000)
- ; CHECK-NEXT: liveins: $r4, $x3
- ; CHECK: INLINEASM
- ; CHECK-NEXT: BDNZ8 %bb.4
- ; CHECK-NEXT: B %bb.3
...
More information about the llvm-commits
mailing list