[PATCH] D150086: [GlobalISel] Implement commuting shl (add/or x, c1), c2 -> add/or (shl x, c2), c1 << c2

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun May 7 22:16:14 PDT 2023

aemerson created this revision.
aemerson added reviewers: arsenm, paquette, foad.
aemerson added a project: LLVM.
Herald added subscribers: StephenFan, kerbowa, steven.zhang, hiraditya, kristof.beyls, jvesely.
Herald added a project: All.
aemerson requested review of this revision.
Herald added a subscriber: wdng.

There's a target hook that's called in DAGCombiner that we stub here, I'll
implement the equivalent override for AArch64 in a subsequent patch since it's
used by different shift combine.

This change by itself has minor code size improvements on arm64 -Os CTMark:

  Program                                       size.__text
                                                outputg181ppyy output8av1cxfn diff
  consumer-typeset/consumer-typeset             410648.00      410648.00       0.0%
  tramp3d-v4/tramp3d-v4                         364176.00      364176.00       0.0%
  kimwitu++/kc                                  449216.00      449212.00      -0.0%
  7zip/7zip-benchmark                           576128.00      576120.00      -0.0%
  sqlite3/sqlite3                               285108.00      285100.00      -0.0%
  SPASS/SPASS                                   411720.00      411688.00      -0.0%
  ClamAV/clamscan                               379868.00      379764.00      -0.0%
  Bullet/bullet                                 452064.00      451928.00      -0.0%
  mafft/pairlocalalign                          246184.00      246108.00      -0.0%
  lencod/lencod                                 428524.00      428152.00      -0.1%
                             Geomean difference                               -0.0%

  rG LLVM Github Monorepo



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