[llvm] 5a50ba0 - [RISCV] Use inheritance instead of nesting multiclass instantiaions. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-05-07T15:00:51-07:00
New Revision: 5a50ba03e9adb1614189530f8a5ef06d90dfd670

URL: https://github.com/llvm/llvm-project/commit/5a50ba03e9adb1614189530f8a5ef06d90dfd670
DIFF: https://github.com/llvm/llvm-project/commit/5a50ba03e9adb1614189530f8a5ef06d90dfd670.diff

LOG: [RISCV] Use inheritance instead of nesting multiclass instantiaions. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
index 3fd98e3d0bbf..970c021297a2 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
@@ -471,10 +471,9 @@ multiclass VPatWidenBinarySDNode_WV_WX<SDNode op, PatFrags extop,
 }
 
 multiclass VPatWidenBinarySDNode_VV_VX_WV_WX<SDNode op, PatFrags extop,
-                                             string instruction_name> {
-  defm : VPatWidenBinarySDNode_VV_VX<op, extop, extop, instruction_name>;
-  defm : VPatWidenBinarySDNode_WV_WX<op, extop, instruction_name>;
-}
+                                             string instruction_name>
+    : VPatWidenBinarySDNode_VV_VX<op, extop, extop, instruction_name>,
+      VPatWidenBinarySDNode_WV_WX<op, extop, instruction_name>;
 
 multiclass VPatWidenMulAddSDNode_VV<PatFrags extop1, PatFrags extop2, string instruction_name> {
   foreach vtiToWti = AllWidenableIntVectors in {
@@ -558,10 +557,10 @@ multiclass VPatWidenBinaryFPSDNode_WV_WF<SDNode op, string instruction_name> {
   }
 }
 
-multiclass VPatWidenBinaryFPSDNode_VV_VF_WV_WF<SDNode op, string instruction_name> {
-  defm : VPatWidenBinaryFPSDNode_VV_VF<op, instruction_name>;
-  defm : VPatWidenBinaryFPSDNode_WV_WF<op, instruction_name>;
-}
+multiclass VPatWidenBinaryFPSDNode_VV_VF_WV_WF<SDNode op,
+                                               string instruction_name>
+    : VPatWidenBinaryFPSDNode_VV_VF<op, instruction_name>,
+      VPatWidenBinaryFPSDNode_WV_WF<op, instruction_name>;
 
 multiclass VPatWidenFPMulAccSDNode_VV_VF<string instruction_name> {
   foreach vtiToWti = AllWidenableFloatVectors in {

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
index 3887e0f401b2..56478c078ac8 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -1196,9 +1196,9 @@ multiclass VPatBinaryExtVL_WV_WX<SDNode op, PatFrags extop, string instruction_n
   }
 }
 
-multiclass VPatBinaryVL_WV_WX_WI<SDNode op, string instruction_name> {
-  defm : VPatBinaryExtVL_WV_WX<op, sext_oneuse, instruction_name>;
-  defm : VPatBinaryExtVL_WV_WX<op, zext_oneuse, instruction_name>;
+multiclass VPatBinaryVL_WV_WX_WI<SDNode op, string instruction_name>
+    : VPatBinaryExtVL_WV_WX<op, sext_oneuse, instruction_name>,
+      VPatBinaryExtVL_WV_WX<op, zext_oneuse, instruction_name> {
   foreach vtiToWti = AllWidenableIntVectors in {
     defvar vti = vtiToWti.Vti;
     defvar wti = vtiToWti.Wti;
@@ -1305,10 +1305,9 @@ multiclass VPatWidenBinaryFPVL_WV_WF<SDNode op, PatFrags extop, string instructi
   }
 }
 
-multiclass VPatWidenBinaryFPVL_VV_VF_WV_WF<SDNode op, string instruction_name> {
-  defm : VPatWidenBinaryFPVL_VV_VF<op, riscv_fpextend_vl_oneuse, instruction_name>;
-  defm : VPatWidenBinaryFPVL_WV_WF<op, riscv_fpextend_vl_oneuse, instruction_name>;
-}
+multiclass VPatWidenBinaryFPVL_VV_VF_WV_WF<SDNode op, string instruction_name>
+    : VPatWidenBinaryFPVL_VV_VF<op, riscv_fpextend_vl_oneuse, instruction_name>,
+      VPatWidenBinaryFPVL_WV_WF<op, riscv_fpextend_vl_oneuse, instruction_name>;
 
 multiclass VPatNarrowShiftSplatExt_WX<SDNode op, PatFrags extop, string instruction_name> {
   foreach vtiToWti = AllWidenableIntVectors in {