[PATCH] D149642: [RISCV] Support vreinterpret intrinsics between vector boolean type and m1 vector integer type
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 5 18:26:54 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:1418
+ def int_riscv_vreinterpret_v
+ : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
----------------
Do we need an intrinsic?
m1 -> mask is bitcast m1 vscale type to <vscale x 64 x i1> and a llvm.experimental.vector.extract
mask -> m1 is llvm.experimental.vector.insert to <vscale x 64 x i1> and a bitcast.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149642/new/
https://reviews.llvm.org/D149642
More information about the llvm-commits
mailing list