[PATCH] D149927: [RISCV] Omit the template parameters in getSerializableMachineMemOperandTargetFlags()
Jie Fu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 4 23:14:16 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG814e8d7c5fb6: [RISCV] Omit the template parameters in getSerializableMachineMemOperandTargetF… (authored by DamonFool).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149927/new/
https://reviews.llvm.org/D149927
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Index: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -2640,7 +2640,7 @@
static const std::pair<MachineMemOperand::Flags, const char *> TargetFlags[] =
{{MONontemporalBit0, "riscv-nontemporal-domain-bit-0"},
{MONontemporalBit1, "riscv-nontemporal-domain-bit-1"}};
- return ArrayRef<std::pair<MachineMemOperand::Flags, const char *>>(TargetFlags);
+ return ArrayRef(TargetFlags);
}
// Returns true if this is the sext.w pattern, addiw rd, rs1, 0.
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