[PATCH] D149916: [VP][SelectionDAG][RISCV] Add get_vector_length intrinsics and generic SelectionDAG support.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 4 15:54:24 PDT 2023
craig.topper created this revision.
craig.topper added reviewers: reames, ABataev, frasercrmck, rogfer01, simoll, hiraditya.
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The generic implementation is umin(TC, VF * vscale).
Lowering to vsetvli for RISC-V will come in a future patch.
This patch is a pre-requisite to be able to CodeGen vectorized code from
D99750 <https://reviews.llvm.org/D99750>.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D149916
Files:
llvm/docs/LangRef.rst
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/include/llvm/IR/Intrinsics.td
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/test/CodeGen/RISCV/rvv/get_vector_length.ll
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