[PATCH] D149778: [Verifier] Allow DW_OP_LLVM_entry_value in IR

Felipe de Azevedo Piovezan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 4 06:34:21 PDT 2023


fdeazeve updated this revision to Diff 519469.
fdeazeve added a comment.

Update verifier code to first check if the operand is a ValueAsMetadata.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149778/new/

https://reviews.llvm.org/D149778

Files:
  llvm/docs/LangRef.rst
  llvm/lib/IR/Verifier.cpp
  llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll


Index: llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
===================================================================
--- llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
+++ llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
@@ -1,14 +1,14 @@
 ; RUN: llvm-as -disable-output <%s 2>&1| FileCheck %s
 
-; The DW_OP_LLVM_entry_value operation can only be used in MIR.
-
-; CHECK: Entry values are only allowed in MIR
+; CHECK: Entry values are only allowed in MIR unless they target a swiftasync Argument
 ; CHECK: call void @llvm.dbg.value(metadata i32 %param, metadata !{{.*}}, metadata !DIExpression(DW_OP_LLVM_entry_value, 1))
+; CHECK-NOT: llvm.dbg.value
 ; CHECK: warning: ignoring invalid debug info
 
-define void @foo(i32 %param) !dbg !4 {
+define void @foo(i32 %param, ptr swiftasync %ok_param) !dbg !4 {
 entry:
   call void @llvm.dbg.value(metadata i32 %param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
+  call void @llvm.dbg.value(metadata ptr %ok_param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
   ret void
 }
 
Index: llvm/lib/IR/Verifier.cpp
===================================================================
--- llvm/lib/IR/Verifier.cpp
+++ llvm/lib/IR/Verifier.cpp
@@ -6332,7 +6332,17 @@
   if (!E || !E->isValid())
     return;
 
-  CheckDI(!E->isEntryValue(), "Entry values are only allowed in MIR", &I);
+  // We allow EntryValues for swift async arguments, as they have an
+  // ABI-guarantee to be turned into a specific register.
+  if (isa<ValueAsMetadata>(I.getRawLocation()))
+    if (auto *ArgLoc = dyn_cast_or_null<Argument>(I.getVariableLocationOp(0));
+        ArgLoc && ArgLoc->hasAttribute(Attribute::SwiftAsync))
+      return;
+
+  CheckDI(!E->isEntryValue(),
+          "Entry values are only allowed in MIR unless they target a "
+          "swiftasync Argument",
+          &I);
 }
 
 void Verifier::verifyCompileUnits() {
Index: llvm/docs/LangRef.rst
===================================================================
--- llvm/docs/LangRef.rst
+++ llvm/docs/LangRef.rst
@@ -1364,6 +1364,8 @@
     a valid attribute for return values and can only be applied to one
     parameter.
 
+.. _swiftasync:
+
 ``swiftasync``
     This indicates that the parameter is the asynchronous context parameter and
     triggers the creation of a target-specific extended frame record to store
@@ -6005,7 +6007,8 @@
   instruction.
 
   Because ``DW_OP_LLVM_entry_value`` is defined in terms of registers, it is
-  only allowed in MIR. The operation is introduced by:
+  usually used in MIR, but it is also allowed in LLVM IR when targetting a
+  :ref:`_swiftasync` argument. The operation is introduced by:
 
     - ``LiveDebugValues`` pass, which applies it to function parameters that
       are unmodified throughout the function. Support is limited to simple


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