[PATCH] D149732: [RISCV] Fix extract_vector_elt on i1 at idx 0 being inverted

[Luke Lau via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd9683a70fef4: [RISCV] Fix extract_vector_elt on i1 at idx 0 being inverted (authored by luke).

Changed prior to commit:
  https://reviews.llvm.org/D149732?vs=519018&id=519424#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149732/new/

https://reviews.llvm.org/D149732

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
  llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-reverse.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
  llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
  llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll

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