[PATCH] D149638: [AArch64] Handle VECTOR_SHUFFL mask with splats

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 4 02:07:21 PDT 2023

jaykang10 abandoned this revision.
jaykang10 added a comment.

In D149638#4317332 <https://reviews.llvm.org/D149638#4317332>, @efriedma wrote:

> When I was mentioning the testcases in D149638 <https://reviews.llvm.org/D149638>, I was think of cases like test11 in build-vector-two-dup.ll.  For values already in vector registers, replacing a tbl with three shuffle instructions probably isn't an improvement (particularly on newer cores where tbl is fast).

Thanks for kind comment.
>From the diff of the test output, I was not sure this transformation is useful even though it does not use constant pool... As you mentioned, in loop, the constant pool load could be hoisted...
Let me close this patch.



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