[llvm] b48a823 - [DebugLine] save one debug line entry for empty prologue
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Wed May 3 21:37:44 PDT 2023
Author: Chen Zheng
Date: 2023-05-04T04:37:34Z
New Revision: b48a8233f5e230e46182bf5c523ceb6a04cec8f5
URL: https://github.com/llvm/llvm-project/commit/b48a8233f5e230e46182bf5c523ceb6a04cec8f5
DIFF: https://github.com/llvm/llvm-project/commit/b48a8233f5e230e46182bf5c523ceb6a04cec8f5.diff
LOG: [DebugLine] save one debug line entry for empty prologue
Some debuggers like DBX on AIX assume the address in debug line
entries is always incremental. But clang generates two entries (entry
for file scope line and entry for prologue end) with same address if
prologue is empty
And if the prologue is empty, seems the first debug line entry for the
function is unnecessary(i.e. removing the first entry won't impact the
behavior in GDB on Linux), so I implement this for all debuggers.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D147506
Added:
Modified:
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll
llvm/test/DebugInfo/XCOFF/empty-prolog.ll
llvm/test/DebugInfo/XCOFF/explicit-section.ll
llvm/test/DebugInfo/XCOFF/function-sections.ll
llvm/test/MC/WebAssembly/debug-info.ll
llvm/test/MC/WebAssembly/debug-info64.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 98f24599970da..635a3f7b43798 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -2107,25 +2107,30 @@ void DwarfDebug::beginInstruction(const MachineInstr *MI) {
PrevInstLoc = DL;
}
-static DebugLoc findPrologueEndLoc(const MachineFunction *MF) {
+static std::pair<DebugLoc, bool> findPrologueEndLoc(const MachineFunction *MF) {
// First known non-DBG_VALUE and non-frame setup location marks
// the beginning of the function body.
DebugLoc LineZeroLoc;
+ bool IsEmptyPrologue = true;
for (const auto &MBB : *MF) {
for (const auto &MI : MBB) {
- if (!MI.isMetaInstruction() && !MI.getFlag(MachineInstr::FrameSetup) &&
- MI.getDebugLoc()) {
- // Scan forward to try to find a non-zero line number. The prologue_end
- // marks the first breakpoint in the function after the frame setup, and
- // a compiler-generated line 0 location is not a meaningful breakpoint.
- // If none is found, return the first location after the frame setup.
- if (MI.getDebugLoc().getLine())
- return MI.getDebugLoc();
- LineZeroLoc = MI.getDebugLoc();
+ if (!MI.isMetaInstruction()) {
+ if (!MI.getFlag(MachineInstr::FrameSetup) && MI.getDebugLoc()) {
+ // Scan forward to try to find a non-zero line number. The
+ // prologue_end marks the first breakpoint in the function after the
+ // frame setup, and a compiler-generated line 0 location is not a
+ // meaningful breakpoint. If none is found, return the first
+ // location after the frame setup.
+ if (MI.getDebugLoc().getLine())
+ return std::make_pair(MI.getDebugLoc(), IsEmptyPrologue);
+
+ LineZeroLoc = MI.getDebugLoc();
+ }
+ IsEmptyPrologue = false;
}
}
}
- return LineZeroLoc;
+ return std::make_pair(LineZeroLoc, IsEmptyPrologue);
}
/// Register a source line with debug info. Returns the unique label that was
@@ -2152,8 +2157,16 @@ static void recordSourceLine(AsmPrinter &Asm, unsigned Line, unsigned Col,
DebugLoc DwarfDebug::emitInitialLocDirective(const MachineFunction &MF,
unsigned CUID) {
+ std::pair<DebugLoc, bool> PrologEnd = findPrologueEndLoc(&MF);
+ DebugLoc PrologEndLoc = PrologEnd.first;
+ bool IsEmptyPrologue = PrologEnd.second;
+
// Get beginning of function.
- if (DebugLoc PrologEndLoc = findPrologueEndLoc(&MF)) {
+ if (PrologEndLoc) {
+ // If the prolog is empty, no need to generate scope line for the proc.
+ if (IsEmptyPrologue)
+ return PrologEndLoc;
+
// Ensure the compile unit is created if the function is called before
// beginFunction().
(void)getOrCreateDwarfCompileUnit(
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll b/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll
index 9f3eb0945c844..adaf54cbc9620 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-of-shifted-dbg-value-fallback.ll
@@ -47,11 +47,10 @@ target triple = "arm64-apple-ios9.0.0"
define void @baz(ptr %arg) !dbg !6 {
; CHECK-LABEL: baz:
; CHECK: .Lfunc_begin0:
-; CHECK-NEXT: .file 1 "/" "tmp.ll"
-; CHECK-NEXT: .loc 1 1 0 // tmp.ll:1:0
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0: // %bb
; CHECK-NEXT: //DEBUG_VALUE: baz:3 <- undef
+; CHECK-NEXT: .file 1 "/" "tmp.ll"
; CHECK-NEXT: .loc 1 4 1 prologue_end // tmp.ll:4:1
; CHECK-NEXT: lsl x8, x0, #4
; CHECK-NEXT: adrp x9, global+202752
diff --git a/llvm/test/DebugInfo/XCOFF/empty-prolog.ll b/llvm/test/DebugInfo/XCOFF/empty-prolog.ll
index cef5908ffaded..6451a0ecfd5e0 100644
--- a/llvm/test/DebugInfo/XCOFF/empty-prolog.ll
+++ b/llvm/test/DebugInfo/XCOFF/empty-prolog.ll
@@ -4,7 +4,6 @@
; CHECK: Address Line Column File ISA Discriminator Flags
; CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-; CHECK-NEXT: 0x0000000000000000 2 0 1 0 0 is_stmt
; CHECK-NEXT: 0x0000000000000000 3 0 1 0 0 is_stmt prologue_end
; CHECK-NEXT: 0x000000000000001c 3 0 1 0 0 is_stmt end_sequence
diff --git a/llvm/test/DebugInfo/XCOFF/explicit-section.ll b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
index 2360ad8f55d82..c84e1df970c33 100644
--- a/llvm/test/DebugInfo/XCOFF/explicit-section.ll
+++ b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
@@ -56,10 +56,9 @@ entry:
; CHECK-NEXT: L..func_begin0:
; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: L..tmp0:
-; CHECK-NEXT: L..tmp1:
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: blr
-; CHECK-NEXT: L..tmp2:
+; CHECK-NEXT: L..tmp1:
; CHECK-NEXT: L..bar0:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
@@ -92,22 +91,22 @@ entry:
; CHECK-NEXT: .main:
; CHECK-NEXT: L..func_begin1:
; CHECK-NEXT: # %bb.0: # %entry
-; CHECK-NEXT: L..tmp3:
+; CHECK-NEXT: L..tmp2:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stwu 1, -64(1)
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: stw 0, 72(1)
; CHECK-NEXT: stw 3, 60(1)
+; CHECK-NEXT: L..tmp3:
; CHECK-NEXT: L..tmp4:
-; CHECK-NEXT: L..tmp5:
; CHECK-NEXT: bl .bar
; CHECK-NEXT: nop
-; CHECK-NEXT: L..tmp6:
+; CHECK-NEXT: L..tmp5:
; CHECK-NEXT: addi 1, 1, 64
; CHECK-NEXT: lwz 0, 8(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
-; CHECK-NEXT: L..tmp7:
+; CHECK-NEXT: L..tmp6:
; CHECK-NEXT: L..main0:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
@@ -281,21 +280,14 @@ entry:
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .byte 0
; CHECK-NEXT: L..prologue_end0:
-; CHECK-NEXT: .byte 0 # Set address to L..tmp0
-; CHECK-NEXT: .byte 5
-; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp0
-; CHECK-NEXT: .byte 1 # Start sequence
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 12
; CHECK-NEXT: .byte 10
-; CHECK-NEXT: .byte 0 # Set address to L..tmp1
+; CHECK-NEXT: .byte 0 # Set address to L..tmp0
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp1
-; CHECK-NEXT: .byte 3 # Advance line 0
-; CHECK-NEXT: .byte 0
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .vbyte 4, L..tmp0
+; CHECK-NEXT: .byte 1 # Start sequence
; CHECK-NEXT: .byte 0 # Set address to L..func_end0
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
@@ -303,28 +295,28 @@ entry:
; CHECK-NEXT: .byte 0 # End sequence
; CHECK-NEXT: .byte 1
; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .byte 0 # Set address to L..tmp3
+; CHECK-NEXT: .byte 0 # Set address to L..tmp2
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp3
+; CHECK-NEXT: .vbyte 4, L..tmp2
; CHECK-NEXT: .byte 19 # Start sequence
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 10
; CHECK-NEXT: .byte 10
-; CHECK-NEXT: .byte 0 # Set address to L..tmp5
+; CHECK-NEXT: .byte 0 # Set address to L..tmp4
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp5
+; CHECK-NEXT: .vbyte 4, L..tmp4
; CHECK-NEXT: .byte 3 # Advance line 1
; CHECK-NEXT: .byte 1
; CHECK-NEXT: .byte 1
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 3
; CHECK-NEXT: .byte 6
-; CHECK-NEXT: .byte 0 # Set address to L..tmp6
+; CHECK-NEXT: .byte 0 # Set address to L..tmp5
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp6
+; CHECK-NEXT: .vbyte 4, L..tmp5
; CHECK-NEXT: .byte 3 # Advance line 0
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .byte 1
diff --git a/llvm/test/DebugInfo/XCOFF/function-sections.ll b/llvm/test/DebugInfo/XCOFF/function-sections.ll
index 2b4d236763a77..6ebfaf0eae4ac 100644
--- a/llvm/test/DebugInfo/XCOFF/function-sections.ll
+++ b/llvm/test/DebugInfo/XCOFF/function-sections.ll
@@ -51,10 +51,9 @@ entry:
; CHECK-NEXT: L..func_begin0:
; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: L..tmp0:
-; CHECK-NEXT: L..tmp1:
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: blr
-; CHECK-NEXT: L..tmp2:
+; CHECK-NEXT: L..tmp1:
; CHECK-NEXT: L..foo0:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
@@ -86,11 +85,10 @@ entry:
; CHECK-NEXT: .csect .bar[PR],5
; CHECK-NEXT: L..func_begin1:
; CHECK-NEXT: # %bb.0: # %entry
-; CHECK-NEXT: L..tmp3:
-; CHECK-NEXT: L..tmp4:
+; CHECK-NEXT: L..tmp2:
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: blr
-; CHECK-NEXT: L..tmp5:
+; CHECK-NEXT: L..tmp3:
; CHECK-NEXT: L..bar0:
; CHECK-NEXT: .vbyte 4, 0x00000000 # Traceback table begin
; CHECK-NEXT: .byte 0x00 # Version = 0
@@ -268,43 +266,29 @@ entry:
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .byte 0
; CHECK-NEXT: L..prologue_end0:
-; CHECK-NEXT: .byte 0 # Set address to L..tmp0
-; CHECK-NEXT: .byte 5
-; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp0
-; CHECK-NEXT: .byte 19 # Start sequence
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 3
; CHECK-NEXT: .byte 10
-; CHECK-NEXT: .byte 0 # Set address to L..tmp1
+; CHECK-NEXT: .byte 0 # Set address to L..tmp0
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp1
-; CHECK-NEXT: .byte 3 # Advance line 1
-; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .vbyte 4, L..tmp0
+; CHECK-NEXT: .byte 20 # Start sequence
; CHECK-NEXT: .byte 0 # Set address to L..func_end0
; CHECK-NEXT: .byte 5
-; CHECK-NEXT: .byte 2
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .vbyte 4, L..func_end0
; CHECK-NEXT: .byte 0 # End sequence
; CHECK-NEXT: .byte 1
; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .byte 0 # Set address to L..tmp3
-; CHECK-NEXT: .byte 5
-; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp3
-; CHECK-NEXT: .byte 24 # Start sequence
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 3
; CHECK-NEXT: .byte 10
-; CHECK-NEXT: .byte 0 # Set address to L..tmp4
+; CHECK-NEXT: .byte 0 # Set address to L..tmp2
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
-; CHECK-NEXT: .vbyte 4, L..tmp4
-; CHECK-NEXT: .byte 3 # Advance line 1
-; CHECK-NEXT: .byte 1
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .vbyte 4, L..tmp2
+; CHECK-NEXT: .byte 25 # Start sequence
; CHECK-NEXT: .byte 0 # Set address to L..func_end1
; CHECK-NEXT: .byte 5
; CHECK-NEXT: .byte 2
diff --git a/llvm/test/MC/WebAssembly/debug-info.ll b/llvm/test/MC/WebAssembly/debug-info.ll
index 0f8a7b0971622..c8ab7a93165fb 100644
--- a/llvm/test/MC/WebAssembly/debug-info.ll
+++ b/llvm/test/MC/WebAssembly/debug-info.ll
@@ -89,56 +89,56 @@
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
-; CHECK-NEXT: Size: 57
+; CHECK-NEXT: Size: 56
; CHECK-NEXT: Offset: 725
; CHECK-NEXT: Name: .debug_line
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 91
-; CHECK-NEXT: Offset: 800
+; CHECK-NEXT: Offset: 799
; CHECK-NEXT: Name: linking
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 9
-; CHECK-NEXT: Offset: 905
+; CHECK-NEXT: Offset: 904
; CHECK-NEXT: Name: reloc.DATA
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 61
-; CHECK-NEXT: Offset: 931
+; CHECK-NEXT: Offset: 930
; CHECK-NEXT: Name: reloc..debug_info
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 18
-; CHECK-NEXT: Offset: 1016
+; CHECK-NEXT: Offset: 1015
; CHECK-NEXT: Name: reloc..debug_aranges
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 6
-; CHECK-NEXT: Offset: 1061
+; CHECK-NEXT: Offset: 1060
; CHECK-NEXT: Name: reloc..debug_pubnames
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 6
-; CHECK-NEXT: Offset: 1095
+; CHECK-NEXT: Offset: 1094
; CHECK-NEXT: Name: reloc..debug_pubtypes
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 6
-; CHECK-NEXT: Offset: 1129
+; CHECK-NEXT: Offset: 1128
; CHECK-NEXT: Name: reloc..debug_line
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 77
-; CHECK-NEXT: Offset: 1159
+; CHECK-NEXT: Offset: 1158
; CHECK-NEXT: Name: producers
; CHECK-NEXT: }
; CHECK-NEXT:]
@@ -176,7 +176,7 @@
; CHECK-NEXT: 0x6 R_WASM_SECTION_OFFSET_I32 .debug_info 0
; CHECK-NEXT: }
; CHECK-NEXT: Section (14) .debug_line {
-; CHECK-NEXT: 0x2B R_WASM_FUNCTION_OFFSET_I32 f2 0
+; CHECK-NEXT: 0x2E R_WASM_FUNCTION_OFFSET_I32 f2 1
; CHECK-NEXT: }
; CHECK-NEXT:]
; CHECK-NEXT:Symbols [
diff --git a/llvm/test/MC/WebAssembly/debug-info64.ll b/llvm/test/MC/WebAssembly/debug-info64.ll
index 5ad27f61478d6..a63200c908b77 100644
--- a/llvm/test/MC/WebAssembly/debug-info64.ll
+++ b/llvm/test/MC/WebAssembly/debug-info64.ll
@@ -89,62 +89,62 @@
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
-; CHECK-NEXT: Size: 61
+; CHECK-NEXT: Size: 60
; CHECK-NEXT: Offset: 781
; CHECK-NEXT: Name: .debug_line
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 91
-; CHECK-NEXT: Offset: 860
+; CHECK-NEXT: Offset: 859
; CHECK-NEXT: Name: linking
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 9
-; CHECK-NEXT: Offset: 965
+; CHECK-NEXT: Offset: 964
; CHECK-NEXT: Name: reloc.DATA
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 61
-; CHECK-NEXT: Offset: 991
+; CHECK-NEXT: Offset: 990
; CHECK-NEXT: Name: reloc..debug_info
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 18
-; CHECK-NEXT: Offset: 1076
+; CHECK-NEXT: Offset: 1075
; CHECK-NEXT: Name: reloc..debug_aranges
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 6
-; CHECK-NEXT: Offset: 1121
+; CHECK-NEXT: Offset: 1120
; CHECK-NEXT: Name: reloc..debug_pubnames
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 6
-; CHECK-NEXT: Offset: 1155
+; CHECK-NEXT: Offset: 1154
; CHECK-NEXT: Name: reloc..debug_pubtypes
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 6
-; CHECK-NEXT: Offset: 1189
+; CHECK-NEXT: Offset: 1188
; CHECK-NEXT: Name: reloc..debug_line
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 77
-; CHECK-NEXT: Offset: 1219
+; CHECK-NEXT: Offset: 1218
; CHECK-NEXT: Name: producers
; CHECK-NEXT: }
; CHECK-NEXT: Section {
; CHECK-NEXT: Type: CUSTOM (0x0)
; CHECK-NEXT: Size: 11
-; CHECK-NEXT: Offset: 1312
+; CHECK-NEXT: Offset: 1311
; CHECK-NEXT: Name: target_features
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -182,7 +182,7 @@
; CHECK-NEXT: 0x6 R_WASM_SECTION_OFFSET_I32 .debug_info 0
; CHECK-NEXT: }
; CHECK-NEXT: Section (14) .debug_line {
-; CHECK-NEXT: 0x2B R_WASM_FUNCTION_OFFSET_I64 f2 0
+; CHECK-NEXT: 0x2E R_WASM_FUNCTION_OFFSET_I64 f2 1
; CHECK-NEXT: }
; CHECK-NEXT: ]
; CHECK-NEXT: Symbols [
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