[PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen
Shao-Ce SUN via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 3 19:18:17 PDT 2023
sunshaoce updated this revision to Diff 519333.
sunshaoce added a comment.
Update `unpackF64OnRV32DSoftABI`, do not use `RISCVISD::BuildPairF64` on zdinx, but use `build_pair + bitcast`.
I forgot to submit this before, now we can get:
$ bin/clang -cc1 -triple riscv32 -target-feature +zdinx -S test.c -O3
foo: # @foo
.Lfoo$local:
.type .Lfoo$local, at function
# %bb.0: # %entry
addi a3, a0, 2044
sw a1, 2044(a0)
sw a2, 4(a3)
ret
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149743/new/
https://reviews.llvm.org/D149743
Files:
llvm/docs/RISCVUsage.rst
llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoD.td
llvm/test/CodeGen/RISCV/double-arith-strict.ll
llvm/test/CodeGen/RISCV/double-arith.ll
llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
llvm/test/CodeGen/RISCV/double-br-fcmp.ll
llvm/test/CodeGen/RISCV/double-calling-conv.ll
llvm/test/CodeGen/RISCV/double-convert-strict.ll
llvm/test/CodeGen/RISCV/double-convert.ll
llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
llvm/test/CodeGen/RISCV/double-fcmp.ll
llvm/test/CodeGen/RISCV/double-frem.ll
llvm/test/CodeGen/RISCV/double-imm.ll
llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
llvm/test/CodeGen/RISCV/double-intrinsics.ll
llvm/test/CodeGen/RISCV/double-isnan.ll
llvm/test/CodeGen/RISCV/double-mem.ll
llvm/test/CodeGen/RISCV/double-previous-failure.ll
llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
llvm/test/CodeGen/RISCV/double-round-conv.ll
llvm/test/CodeGen/RISCV/double-select-fcmp.ll
llvm/test/CodeGen/RISCV/double-select-icmp.ll
llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
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