[PATCH] D149488: [RISCV] Use AMOSWAP for 32 and 64-bit atomic stores
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 3 04:09:22 PDT 2023
asb added a comment.
Do you know if GCC landed this change as well?
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9598
+
+// returns true for seq_cst stores of 32/64bit
+bool canAmoSwapStoreInst(const StoreInst *SI, const RISCVSubtarget &Subtarget) {
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Nit: Capitalise 'returns' and add full stop at end of sentence.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D149488/new/
https://reviews.llvm.org/D149488
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