[llvm] a070cb5 - [RISCV] Return false from isShuffleMaskLegal for i1 vectors.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-05-02T21:49:11-07:00
New Revision: a070cb5e9b41b7eb2e9e440db6996fbacc4afd9d

URL: https://github.com/llvm/llvm-project/commit/a070cb5e9b41b7eb2e9e440db6996fbacc4afd9d
DIFF: https://github.com/llvm/llvm-project/commit/a070cb5e9b41b7eb2e9e440db6996fbacc4afd9d.diff

LOG: [RISCV] Return false from isShuffleMaskLegal for i1 vectors.

We don't have i1 vector shuffle lowering.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index e1c1d621d287..2c356058e86a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -4109,6 +4109,10 @@ bool RISCVTargetLowering::isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const {
 
   MVT SVT = VT.getSimpleVT();
 
+  // Not for i1 vectors.
+  if (SVT.getScalarType() == MVT::i1)
+    return false;
+
   int Dummy1, Dummy2;
   return (isElementRotate(Dummy1, Dummy2, M) > 0) ||
          isInterleaveShuffle(M, SVT, Dummy1, Dummy2, Subtarget);