[PATCH] D149715: IR: Add llvm.frexp intrinsic

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 2 19:16:47 PDT 2023


arsenm created this revision.
arsenm added reviewers: jcranmer-intel, andrew.w.kaylor, foad, kpn, tra, sepavloff.
Herald added subscribers: kosarev, StephenFan, jdoerfert, kerbowa, pengfei, hiraditya, tpr, jvesely, nemanjai.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

Add an intrinsic which returns the two pieces as multiple return
values. Alternatively could introduce a pair of intrinsics to
separately return the fractional and exponent parts.

      

AMDGPU has native instructions to return the two halves, but could use
some generic legalization and optimization handling. For example, we
should be able to handle legalization of f16 on older targets, and for
bf16. Additionally antique targets need a hardware workaround which
would be better handled in the backend rather than in library code
where it is now.


https://reviews.llvm.org/D149715

Files:
  llvm/docs/LangRef.rst
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/RuntimeLibcalls.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/IR/RuntimeLibcalls.def
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/GenericOpcodes.td
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
  llvm/test/CodeGen/PowerPC/llvm.frexp.ll
  llvm/test/CodeGen/X86/llvm.frexp.f80.ll
  llvm/test/CodeGen/X86/llvm.frexp.ll

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