[PATCH] D149682: [SelectionDAG][NFCI] Use common logic for identifying MMI vars
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 2 12:51:23 PDT 2023
fdeazeve created this revision.
fdeazeve added a reviewer: aprantl.
Herald added subscribers: ecnelises, hiraditya.
Herald added a project: All.
fdeazeve requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
After function argument lowering, but prior to instruction selection,
dbg declares pointing to function arguments are lowered using special
logic.
Later, during instruction selection (both "fast" and regular ISel), this
logic is "repeated" in order to identify which intrinsics have already
been lowered. This is bad for two reasons:
1. The logic is not _really_ repeated, the code is different, which
could lead to duplicate lowering of the intrinsic.
2. Even if the logic were repeated properly, this is still code
duplication.
This patch addresses these issues by storing all preprocessed
dbg.declare intrinsics in a set inside FuncInfo; the set is queried upon
instruction selection.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D149682
Files:
llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D149682.518835.patch
Type: text/x-patch
Size: 6053 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230502/5d05935b/attachment.bin>
More information about the llvm-commits
mailing list