[PATCH] D148624: [AArch64] Add sign bits handling for vector compare nodes

[Lawrence Benson via Phabricator via llvm-commits]

lawben accepted this revision.
lawben added a comment.

Together with my observation in D148316 <https://reviews.llvm.org/D148316> and the new tests, this looks good.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148624/new/

https://reviews.llvm.org/D148624