[PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

With my psABI hat on I'm still very concerned about proposing breaking the ABI in future. Getting memory ordering wrong leads to a world of pain with subtle bugs that can only be reproduced on some systems some of the time. The current mapping is the de-facto ABI that should have been written down more formally, and there needs to be an extremely strong motivator to break it, not just "a small amount of code will get slightly faster". Note that I'm not claiming that's what's going on, but reading the mailing list threads doesn't immediately give a clear picture, and so those that care about this need to come forward with a clearly laid out explanation for why the current state is insufficient and must be changed to the proposed state, bearing in mind the pain that comes from breaking ABI and that there will be a many year interim period where performance is *worse* than both of the before and after states.


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  https://reviews.llvm.org/D149486/new/

https://reviews.llvm.org/D149486