[PATCH] D148184: [AMDGPU] Use resource base for buffer instruction MachineMemOperands

Krzysztof Drewniak via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 1 09:03:24 PDT 2023


krzysz00 added a comment.

>From what I worked out looking through the code, we were using `offset` somewhat incorrectly here, and it's meant for handling  memory operations that were split in the backend.

That is, if I have

  %x = load i128, ptr %a
  %b = getelementptr i128, ptr %a, i32 1
  %y = load i128, ptr %b

those'll become - and stay `(load (s128) from %ir.a)` and `(load (s128) from %ir.b)`

But, if, as the backend, I can't do a 128-bit load and need to do them as a pair of 64-bit loads, I'll construct the memory operands `(load (s64) from %.ir.a)`, `(load (s64) from %.ir.a + 8)`, `(load (s64) from %.ir.b)`, and `(load (s64) from %.ir.b + 8)` to represent how I've chopped up the load up and that those two loads from the same IR value don't actually alias


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