[llvm] e876ba5 - [NFC][HWASAN] Handle tags as Int8
Vitaly Buka via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 30 20:01:18 PDT 2023
Author: Vitaly Buka
Date: 2023-04-30T19:58:01-07:00
New Revision: e876ba5db98830db427395ed9b3718d20bf519fb
URL: https://github.com/llvm/llvm-project/commit/e876ba5db98830db427395ed9b3718d20bf519fb
DIFF: https://github.com/llvm/llvm-project/commit/e876ba5db98830db427395ed9b3718d20bf519fb.diff
LOG: [NFC][HWASAN] Handle tags as Int8
Added:
Modified:
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 55ee31b91318..c94bfbc20288 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -988,7 +988,8 @@ void HWAddressSanitizer::tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *Tag,
if (!UseShortGranules)
Size = AlignedSize;
- Tag = IRB.CreateTrunc(Tag, IRB.getInt8Ty());
+ assert(Tag->getType() == Int8Ty);
+
if (InstrumentWithCalls) {
IRB.CreateCall(HwasanTagMemoryFunc,
{IRB.CreatePointerCast(AI, Int8PtrTy), Tag,
@@ -1037,15 +1038,15 @@ unsigned HWAddressSanitizer::retagMask(unsigned AllocaNo) {
return FastMasks[AllocaNo % std::size(FastMasks)];
}
-Value *HWAddressSanitizer::applyTagMask(IRBuilder<> &IRB, Value *OldTag) {
- if (TagMaskByte == 0xFF)
- return OldTag; // No need to clear the tag byte.
- return IRB.CreateAnd(OldTag,
- ConstantInt::get(OldTag->getType(), TagMaskByte));
+Value *HWAddressSanitizer::applyTagMask(IRBuilder<> &IRB, Value *Tag) {
+ Tag = IRB.CreateTrunc(Tag, Int8Ty);
+ if (TagMaskByte != 0xFF) // No need to clear the tag byte.
+ Tag = IRB.CreateAnd(Tag, ConstantInt::get(Tag->getType(), TagMaskByte));
+ return Tag;
}
Value *HWAddressSanitizer::getNextTagWithCall(IRBuilder<> &IRB) {
- return IRB.CreateZExt(IRB.CreateCall(HwasanGenerateTagFunc), IntptrTy);
+ return IRB.CreateCall(HwasanGenerateTagFunc);
}
Value *HWAddressSanitizer::getStackBaseTag(IRBuilder<> &IRB) {
@@ -1076,7 +1077,6 @@ Value *HWAddressSanitizer::getUARTag(IRBuilder<> &IRB) {
Value *StackPointerLong = getSP(IRB);
Value *UARTag =
applyTagMask(IRB, IRB.CreateLShr(StackPointerLong, PointerTagShift));
-
UARTag->setName("hwasan.uar.tag");
return UARTag;
}
@@ -1086,6 +1086,8 @@ Value *HWAddressSanitizer::tagPointer(IRBuilder<> &IRB, Type *Ty,
Value *PtrLong, Value *Tag) {
assert(!UsePageAliases);
Value *TaggedPtrLong;
+ assert(Tag->getType() == Int8Ty);
+ Tag = IRB.CreateZExt(Tag, IntptrTy);
if (CompileKernel) {
// Kernel addresses have 0xFF in the most significant byte.
Value *ShiftedTag =
@@ -1211,7 +1213,7 @@ void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
case instr: {
ThreadLongMaybeUntagged = getThreadLongMaybeUntagged();
- StackBaseTag = IRB.CreateAShr(ThreadLong, 3);
+ StackBaseTag = applyTagMask(IRB, IRB.CreateAShr(ThreadLong, 3));
// Store data to ring buffer.
Value *FrameRecordInfo = getFrameRecordInfo(IRB);
@@ -1309,6 +1311,7 @@ bool HWAddressSanitizer::instrumentStack(memtag::StackInfo &SInfo,
std::string Name =
AI->hasName() ? AI->getName().str() : "alloca." + itostr(N);
Replacement->setName(Name + ".hwasan");
+ Tag->setName(Name + ".tag");
size_t Size = memtag::getAllocaSizeInBytes(*AI);
size_t AlignedSize = alignTo(Size, Mapping.getObjectAlignment());
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
index bbfb35549b5b..28b1f2fbbe8f 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
@@ -15,46 +15,46 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]
-; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
-; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; CHECK-NEXT: [[TMP7:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP6]]
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr
+; CHECK-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8
+; CHECK-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; CHECK-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; CHECK-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP1]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP16]] to i8
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag()
-; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64
+; CHECK-NEXT: [[X_TAG:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], 72057594037927935
-; CHECK-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 56
-; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
-; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
+; CHECK-NEXT: [[TMP19:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP19]], 56
+; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
-; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
+; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP24]]
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP26]], align 1
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; CHECK-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1
+; CHECK-NEXT: store i8 [[X_TAG]], ptr [[TMP27]], align 1
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
+; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
+; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP30]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
index 96ff7cb7efb2..9de1c8676fec 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
@@ -17,32 +17,33 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
-; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
+; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8
+; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56
+; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]], !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
+; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]], !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP12]], !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP13]], i32 0, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP15]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP18]], !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
@@ -52,32 +53,33 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
-; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
+; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8
+; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56
+; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]], !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP13]], i32 0, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP15]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
index a4fef0d49dc2..80b85cc39394 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
@@ -21,74 +21,74 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test to i64), [[TMP5]]
-; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
-; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; CHECK-NEXT: [[TMP7:%.*]] = or i64 ptrtoint (ptr @test to i64), [[TMP6]]
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr
+; CHECK-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8
+; CHECK-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; CHECK-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; CHECK-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP1]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP16]] to i8
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0
-; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935
-; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56
-; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
+; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP3]], 0
+; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], 72057594037927935
+; CHECK-NEXT: [[TMP19:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP19]], 56
+; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
-; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8
-; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
-; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
-; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
-; CHECK-NEXT: store i8 4, ptr [[TMP25]], align 1
-; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP26]], align 1
+; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935
+; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
+; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP24]]
+; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
+; CHECK-NEXT: store i8 4, ptr [[TMP26]], align 1
+; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; CHECK-NEXT: store i8 [[X_TAG]], ptr [[TMP27]], align 1
; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont:
-; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP30]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP30]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: ret void
; CHECK: lpad:
; CHECK-NEXT: [[TMP32:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: [[TMP33:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 19)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EXN_SLOT]], i32 19)
; CHECK-NEXT: store ptr [[TMP33]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 18)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EHSELECTOR_SLOT]], i32 18)
; CHECK-NEXT: store i32 [[TMP34]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])
-; CHECK-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
-; CHECK-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
-; CHECK-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP38]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
+; CHECK-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
+; CHECK-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP37]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: br label [[EH_RESUME:%.*]]
; CHECK: eh.resume:
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 3)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EXN_SLOT]], i32 3)
; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 2)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EHSELECTOR_SLOT]], i32 2)
; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0
; CHECK-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
index eec644757b0a..434f6ed62a83 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
@@ -15,35 +15,37 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @_Z6targetv to i64), [[TMP5]]
-; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
-; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; CHECK-NEXT: [[TMP7:%.*]] = or i64 ptrtoint (ptr @_Z6targetv to i64), [[TMP6]]
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr
+; CHECK-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8
+; CHECK-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56
+; CHECK-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8
+; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; CHECK-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP1]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1
+; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP5]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP16]] to i8
; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16
-; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0
-; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935
-; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56
-; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
-; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
-; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8
-; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
-; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP24]], i8 [[TMP20]], i64 256, i1 false)
+; CHECK-NEXT: [[BUF_TAG:%.*]] = xor i8 [[TMP3]], 0
+; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], 72057594037927935
+; CHECK-NEXT: [[TMP19:%.*]] = zext i8 [[BUF_TAG]] to i64
+; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP19]], 56
+; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
+; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
+; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935
+; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
+; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP24]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 [[BUF_TAG]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
@@ -52,18 +54,17 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
; CHECK: while.body:
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr @stackbuf, i32 19)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr @stackbuf, i32 19)
; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8
; CHECK-NEXT: call void @may_jump()
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; CHECK-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; CHECK-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP28]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 256, i1 false)
+; CHECK-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP28]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[HWASAN_UAR_TAG]], i64 256, i1 false)
; CHECK-NEXT: ret i1 [[RETVAL_0]]
;
entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
index 72a0f6bc8df5..ff020cda117a 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
@@ -14,32 +14,32 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20
; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]]
-; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP4]], 63
-; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 57
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP5]], 63
+; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i8 [[TMP5]], 63
+; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP2]], 57
+; CHECK-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP7]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
-; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
+; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0
+; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], -9079256848778919937
+; CHECK-NEXT: [[TMP10:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP11:%.*]] = shl i64 [[TMP10]], 57
+; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[TMP9]], [[TMP11]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP12]] to ptr
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[X_TAG]], i64 16)
; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16
-; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1
+; CHECK-NEXT: [[Y_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 1
; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -9079256848778919937
-; CHECK-NEXT: [[TMP15:%.*]] = shl i64 [[TMP12]], 57
-; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP14]], [[TMP15]]
-; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP16]] to ptr
-; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP12]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP17]], i64 16)
+; CHECK-NEXT: [[TMP15:%.*]] = zext i8 [[Y_TAG]] to i64
+; CHECK-NEXT: [[TMP16:%.*]] = shl i64 [[TMP15]], 57
+; CHECK-NEXT: [[TMP17:%.*]] = or i64 [[TMP14]], [[TMP16]]
+; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[Y_TAG]], i64 16)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
-; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP18]], i64 16)
-; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP19]], i64 16)
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[HWASAN_UAR_TAG]], i64 16)
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[HWASAN_UAR_TAG]], i64 16)
; CHECK-NEXT: ret void
;
%x = alloca i8, i64 4
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
index 2a82d708a0ef..d0271d3722bb 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
@@ -16,20 +16,19 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 57
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP2]], 63
+; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP3]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -9079256848778919937
-; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 57
-; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
+; CHECK-NEXT: [[X_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -9079256848778919937
+; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 57
+; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
-; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16)
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[X_TAG]], i64 16)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[HWASAN_UAR_TAG]], i64 16)
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
index 4bba5365b07c..55e9aa8e35bf 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
@@ -18,21 +18,22 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63
-; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63
+; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i8 [[TMP4]], 63
+; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP1]], 57
+; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP6]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
-; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
-; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57
-; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
-; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
+; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
+; CHECK-NEXT: [[TMP9:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP10:%.*]] = shl i64 [[TMP9]], 57
+; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[TMP8]], [[TMP10]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[X_TAG]], i64 16)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[HWASAN_UAR_TAG]], i64 16)
; CHECK-NEXT: ret void
;
; INLINE-LABEL: define void @test_alloca
@@ -41,46 +42,48 @@ define void @test_alloca() sanitize_hwaddress {
; INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
; INLINE-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; INLINE-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; INLINE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; INLINE-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]
-; INLINE-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; INLINE-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
-; INLINE-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; INLINE-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; INLINE-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; INLINE-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; INLINE-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; INLINE-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57
-; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63
+; INLINE-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
+; INLINE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 63
+; INLINE-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; INLINE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; INLINE-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
+; INLINE-NEXT: [[TMP8:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP7]]
+; INLINE-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP1]] to ptr
+; INLINE-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8
+; INLINE-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP0]], 56
+; INLINE-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12
+; INLINE-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1
+; INLINE-NEXT: [[TMP13:%.*]] = add i64 [[TMP0]], 8
+; INLINE-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]]
+; INLINE-NEXT: store i64 [[TMP14]], ptr @__hwasan_tls, align 8
+; INLINE-NEXT: [[TMP15:%.*]] = or i64 [[TMP1]], 4294967295
+; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
+; INLINE-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; INLINE-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP6]], 57
+; INLINE-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i8
+; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP18]], 63
; INLINE-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0
-; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], -9079256848778919937
-; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57
-; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]
-; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
-; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
-; INLINE-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], -9079256848778919937
-; INLINE-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
-; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
-; INLINE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
-; INLINE-NEXT: store i8 4, ptr [[TMP26]], align 1
-; INLINE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1
+; INLINE-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP4]], 0
+; INLINE-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
+; INLINE-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], -9079256848778919937
+; INLINE-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64
+; INLINE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 57
+; INLINE-NEXT: [[TMP23:%.*]] = or i64 [[TMP20]], [[TMP22]]
+; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; INLINE-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; INLINE-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], -9079256848778919937
+; INLINE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; INLINE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
+; INLINE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; INLINE-NEXT: store i8 4, ptr [[TMP28]], align 1
+; INLINE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; INLINE-NEXT: store i8 [[X_TAG]], ptr [[TMP29]], align 1
; INLINE-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
-; INLINE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; INLINE-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], -9079256848778919937
-; INLINE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; INLINE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
-; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; INLINE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[X]] to i64
+; INLINE-NEXT: [[TMP31:%.*]] = and i64 [[TMP30]], -9079256848778919937
+; INLINE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
+; INLINE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP32]]
+; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; INLINE-NEXT: ret void
;
entry:
@@ -99,23 +102,24 @@ define i32 @test_simple(ptr %a) sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63
-; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63
+; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i8 [[TMP4]], 63
+; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP1]], 57
+; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP6]], 63
; CHECK-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
-; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
-; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
-; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57
-; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
-; CHECK-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
-; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP10]], i64 16)
-; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
-; CHECK-NEXT: call void @__hwasan_store1(i64 [[TMP11]])
+; CHECK-NEXT: [[BUF_SROA_0_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
+; CHECK-NEXT: [[TMP9:%.*]] = zext i8 [[BUF_SROA_0_TAG]] to i64
+; CHECK-NEXT: [[TMP10:%.*]] = shl i64 [[TMP9]], 57
+; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[TMP8]], [[TMP10]]
+; CHECK-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[BUF_SROA_0_TAG]], i64 16)
+; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
+; CHECK-NEXT: call void @__hwasan_store1(i64 [[TMP12]])
; CHECK-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
-; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP12]], i64 16)
+; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[HWASAN_UAR_TAG]], i64 16)
; CHECK-NEXT: ret i32 0
;
; INLINE-LABEL: define i32 @test_simple
@@ -124,76 +128,78 @@ define i32 @test_simple(ptr %a) sanitize_hwaddress {
; INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
; INLINE-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
-; INLINE-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; INLINE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; INLINE-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP5]]
-; INLINE-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
-; INLINE-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
-; INLINE-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; INLINE-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; INLINE-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; INLINE-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; INLINE-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; INLINE-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
-; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
-; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57
-; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63
+; INLINE-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8
+; INLINE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 63
+; INLINE-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; INLINE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; INLINE-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
+; INLINE-NEXT: [[TMP8:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP7]]
+; INLINE-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP1]] to ptr
+; INLINE-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8
+; INLINE-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP0]], 56
+; INLINE-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12
+; INLINE-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1
+; INLINE-NEXT: [[TMP13:%.*]] = add i64 [[TMP0]], 8
+; INLINE-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]]
+; INLINE-NEXT: store i64 [[TMP14]], ptr @__hwasan_tls, align 8
+; INLINE-NEXT: [[TMP15:%.*]] = or i64 [[TMP1]], 4294967295
+; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
+; INLINE-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; INLINE-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP6]], 57
+; INLINE-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i8
+; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP18]], 63
; INLINE-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
-; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0
-; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], -9079256848778919937
-; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57
-; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]]
-; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
-; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
-; INLINE-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], -9079256848778919937
-; INLINE-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
-; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
-; INLINE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
-; INLINE-NEXT: store i8 1, ptr [[TMP26]], align 1
-; INLINE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15
-; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1
-; INLINE-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
-; INLINE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 57
-; INLINE-NEXT: [[TMP30:%.*]] = trunc i64 [[TMP29]] to i8
-; INLINE-NEXT: [[TMP31:%.*]] = and i64 [[TMP28]], -9079256848778919937
-; INLINE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
-; INLINE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP32]]
-; INLINE-NEXT: [[TMP34:%.*]] = load i8, ptr [[TMP33]], align 1
-; INLINE-NEXT: [[TMP35:%.*]] = icmp ne i8 [[TMP30]], [[TMP34]]
-; INLINE-NEXT: br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP50:%.*]], !prof [[PROF1:![0-9]+]]
-; INLINE: 36:
-; INLINE-NEXT: [[TMP37:%.*]] = icmp ugt i8 [[TMP34]], 15
-; INLINE-NEXT: br i1 [[TMP37]], label [[TMP38:%.*]], label [[TMP39:%.*]], !prof [[PROF1]]
+; INLINE-NEXT: [[BUF_SROA_0_TAG:%.*]] = xor i8 [[TMP4]], 0
+; INLINE-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; INLINE-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], -9079256848778919937
+; INLINE-NEXT: [[TMP21:%.*]] = zext i8 [[BUF_SROA_0_TAG]] to i64
+; INLINE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 57
+; INLINE-NEXT: [[TMP23:%.*]] = or i64 [[TMP20]], [[TMP22]]
+; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; INLINE-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; INLINE-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], -9079256848778919937
+; INLINE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; INLINE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
+; INLINE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; INLINE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; INLINE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15
+; INLINE-NEXT: store i8 [[BUF_SROA_0_TAG]], ptr [[TMP29]], align 1
+; INLINE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
+; INLINE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 57
+; INLINE-NEXT: [[TMP32:%.*]] = trunc i64 [[TMP31]] to i8
+; INLINE-NEXT: [[TMP33:%.*]] = and i64 [[TMP30]], -9079256848778919937
+; INLINE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; INLINE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP34]]
+; INLINE-NEXT: [[TMP36:%.*]] = load i8, ptr [[TMP35]], align 1
+; INLINE-NEXT: [[TMP37:%.*]] = icmp ne i8 [[TMP32]], [[TMP36]]
+; INLINE-NEXT: br i1 [[TMP37]], label [[TMP38:%.*]], label [[TMP52:%.*]], !prof [[PROF1:![0-9]+]]
; INLINE: 38:
-; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP28]])
+; INLINE-NEXT: [[TMP39:%.*]] = icmp ugt i8 [[TMP36]], 15
+; INLINE-NEXT: br i1 [[TMP39]], label [[TMP40:%.*]], label [[TMP41:%.*]], !prof [[PROF1]]
+; INLINE: 40:
+; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP30]])
; INLINE-NEXT: unreachable
-; INLINE: 39:
-; INLINE-NEXT: [[TMP40:%.*]] = and i64 [[TMP28]], 15
-; INLINE-NEXT: [[TMP41:%.*]] = trunc i64 [[TMP40]] to i8
-; INLINE-NEXT: [[TMP42:%.*]] = add i8 [[TMP41]], 0
-; INLINE-NEXT: [[TMP43:%.*]] = icmp uge i8 [[TMP42]], [[TMP34]]
-; INLINE-NEXT: br i1 [[TMP43]], label [[TMP38]], label [[TMP44:%.*]], !prof [[PROF1]]
-; INLINE: 44:
-; INLINE-NEXT: [[TMP45:%.*]] = or i64 [[TMP31]], 15
-; INLINE-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
-; INLINE-NEXT: [[TMP47:%.*]] = load i8, ptr [[TMP46]], align 1
-; INLINE-NEXT: [[TMP48:%.*]] = icmp ne i8 [[TMP30]], [[TMP47]]
-; INLINE-NEXT: br i1 [[TMP48]], label [[TMP38]], label [[TMP49:%.*]], !prof [[PROF1]]
-; INLINE: 49:
-; INLINE-NEXT: br label [[TMP50]]
-; INLINE: 50:
+; INLINE: 41:
+; INLINE-NEXT: [[TMP42:%.*]] = and i64 [[TMP30]], 15
+; INLINE-NEXT: [[TMP43:%.*]] = trunc i64 [[TMP42]] to i8
+; INLINE-NEXT: [[TMP44:%.*]] = add i8 [[TMP43]], 0
+; INLINE-NEXT: [[TMP45:%.*]] = icmp uge i8 [[TMP44]], [[TMP36]]
+; INLINE-NEXT: br i1 [[TMP45]], label [[TMP40]], label [[TMP46:%.*]], !prof [[PROF1]]
+; INLINE: 46:
+; INLINE-NEXT: [[TMP47:%.*]] = or i64 [[TMP33]], 15
+; INLINE-NEXT: [[TMP48:%.*]] = inttoptr i64 [[TMP47]] to ptr
+; INLINE-NEXT: [[TMP49:%.*]] = load i8, ptr [[TMP48]], align 1
+; INLINE-NEXT: [[TMP50:%.*]] = icmp ne i8 [[TMP32]], [[TMP49]]
+; INLINE-NEXT: br i1 [[TMP50]], label [[TMP40]], label [[TMP51:%.*]], !prof [[PROF1]]
+; INLINE: 51:
+; INLINE-NEXT: br label [[TMP52]]
+; INLINE: 52:
; INLINE-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
-; INLINE-NEXT: [[TMP51:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; INLINE-NEXT: [[TMP52:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT: [[TMP53:%.*]] = and i64 [[TMP52]], -9079256848778919937
-; INLINE-NEXT: [[TMP54:%.*]] = lshr i64 [[TMP53]], 4
-; INLINE-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP54]]
-; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP55]], i8 [[TMP51]], i64 1, i1 false)
+; INLINE-NEXT: [[TMP53:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
+; INLINE-NEXT: [[TMP54:%.*]] = and i64 [[TMP53]], -9079256848778919937
+; INLINE-NEXT: [[TMP55:%.*]] = lshr i64 [[TMP54]], 4
+; INLINE-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP55]]
+; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP56]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; INLINE-NEXT: ret i32 0
;
entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
index 51d34ce5b388..81fad68ac99a 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
@@ -13,62 +13,62 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8
-; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8
-; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
+; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; CHECK-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 8
+; CHECK-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; CHECK-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; CHECK-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 8
+; CHECK-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0
-; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56
-; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
-; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
-; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
-; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
-; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
+; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP5]], 0
+; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP21:%.*]] = and i64 [[TMP20]], 72057594037927935
+; CHECK-NEXT: [[TMP22:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP23:%.*]] = shl i64 [[TMP22]], 56
+; CHECK-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
+; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP26:%.*]] = and i64 [[TMP25]], 72057594037927935
+; CHECK-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
+; CHECK-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP27]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[X_TAG]], i64 1, i1 false)
; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16
-; CHECK-NEXT: [[TMP28:%.*]] = xor i64 [[TMP4]], 128
+; CHECK-NEXT: [[Y_TAG:%.*]] = xor i8 [[TMP5]], -128
; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT: [[TMP31:%.*]] = shl i64 [[TMP28]], 56
-; CHECK-NEXT: [[TMP32:%.*]] = or i64 [[TMP30]], [[TMP31]]
-; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP32]] to ptr
-; CHECK-NEXT: [[TMP33:%.*]] = trunc i64 [[TMP28]] to i8
+; CHECK-NEXT: [[TMP31:%.*]] = zext i8 [[Y_TAG]] to i64
+; CHECK-NEXT: [[TMP32:%.*]] = shl i64 [[TMP31]], 56
+; CHECK-NEXT: [[TMP33:%.*]] = or i64 [[TMP30]], [[TMP32]]
+; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP33]] to ptr
; CHECK-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
; CHECK-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; CHECK-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[Y_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
-; CHECK-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; CHECK-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; CHECK-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
-; CHECK-NEXT: [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[Y]] to i64
-; CHECK-NEXT: [[TMP45:%.*]] = and i64 [[TMP44]], 72057594037927935
-; CHECK-NEXT: [[TMP46:%.*]] = lshr i64 [[TMP45]], 4
-; CHECK-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP46]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP47]], i8 [[TMP43]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP39:%.*]] = and i64 [[TMP38]], 72057594037927935
+; CHECK-NEXT: [[TMP40:%.*]] = lshr i64 [[TMP39]], 4
+; CHECK-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP40]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP41]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP42:%.*]] = ptrtoint ptr [[Y]] to i64
+; CHECK-NEXT: [[TMP43:%.*]] = and i64 [[TMP42]], 72057594037927935
+; CHECK-NEXT: [[TMP44:%.*]] = lshr i64 [[TMP43]], 4
+; CHECK-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP44]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP45]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: ret void
;
%x = alloca i8, i64 4
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
index 0ef09321e41a..5fbbe2cebf95 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
@@ -16,44 +16,44 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
-; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
-; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]]
-; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr
-; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8
-; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56
-; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12
-; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1
-; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8
-; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]]
-; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
-; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
-; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
+; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8
+; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56
+; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8
+; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8
+; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP17:%.*]] = call i8 @__hwasan_generate_tag()
-; CHECK-NEXT: [[TMP18:%.*]] = zext i8 [[TMP17]] to i64
+; CHECK-NEXT: [[X_TAG:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56
-; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
-; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
+; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56
+; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[TMP20]], [[TMP22]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
-; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[X_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
-; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP31]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
+; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
+; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
index 4248c3e3a8ac..1743bd639db3 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
@@ -17,32 +17,33 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
-; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
+; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8
+; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56
+; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]], !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
-; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
+; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]], !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP12]], !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP13]], i32 0, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
+; DYNAMIC-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP15]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
-; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP18]], !dbg [[DBG14]]
-; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
+; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
@@ -52,32 +53,33 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
-; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
+; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8
+; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56
+; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
-; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]], !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP13]], i32 0, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP14]], align 1, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
+; ZERO-BASED-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP15]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
-; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr, !dbg [[DBG14]]
-; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
+; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
index 9e9fceb5eb47..65739e6cc42e 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
@@ -22,48 +22,49 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
-; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
-; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]]
-; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr
-; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8
-; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56
-; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12
-; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1
-; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8
-; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]]
-; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
-; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
-; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
+; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8
+; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56
+; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8
+; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8
+; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
-; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935
-; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56
-; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
+; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP4]], 0
+; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
+; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56
+; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[TMP20]], [[TMP22]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
-; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
-; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
-; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
-; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
+; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[X_TAG]], i64 1, i1 false)
; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont:
-; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: ret void
; CHECK: lpad:
@@ -72,24 +73,23 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: [[TMP33:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP33]])
; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EXN_SLOT]], i32 19)
; CHECK-NEXT: store ptr [[TMP34]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP35:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EHSELECTOR_SLOT]], i32 18)
; CHECK-NEXT: store i32 [[TMP35]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])
-; CHECK-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
-; CHECK-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP39]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
+; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
+; CHECK-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
+; CHECK-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: br label [[EH_RESUME:%.*]]
; CHECK: eh.resume:
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 3)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EXN_SLOT]], i32 3)
; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 2)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EHSELECTOR_SLOT]], i32 2)
; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0
; CHECK-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
index 7652587ce4ec..3ebdb6185f66 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
@@ -16,29 +16,30 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
-; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
+; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
-; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP4]], -72057594037927936
-; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56
-; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP6]], 72057594037927935
-; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP5]], [[TMP7]]
-; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
-; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8
-; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64
-; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[TMP10]], -72057594037927936
-; CHECK-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4
-; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false)
+; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0
+; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP6:%.*]] = or i64 [[TMP5]], -72057594037927936
+; CHECK-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56
+; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP8]], 72057594037927935
+; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[TMP6]], [[TMP9]]
+; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
+; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[X]] to i64
+; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[TMP11]], -72057594037927936
+; CHECK-NEXT: [[TMP13:%.*]] = lshr i64 [[TMP12]], 4
+; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP14]], i8 [[X_TAG]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
-; CHECK-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP15]], -72057594037927936
; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4
; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false)
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
index 4bb846bff274..e032e62e5bbd 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
@@ -16,36 +16,38 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
-; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
-; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]]
-; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr
-; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8
-; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56
-; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12
-; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1
-; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8
-; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]]
-; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
-; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
-; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
-; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
+; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr
+; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8
+; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56
+; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8
+; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8
+; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295
+; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56
+; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16
-; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
-; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935
-; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56
-; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]]
-; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
-; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
-; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[BUF]] to i64
-; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
-; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
-; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 256, i1 false)
+; CHECK-NEXT: [[BUF_TAG:%.*]] = xor i8 [[TMP4]], 0
+; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
+; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[BUF_TAG]] to i64
+; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56
+; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[TMP20]], [[TMP22]]
+; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[BUF]] to i64
+; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
+; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[BUF_TAG]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
@@ -54,18 +56,17 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
; CHECK: while.body:
-; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr @stackbuf, i32 19)
+; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr @stackbuf, i32 19)
; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8
; CHECK-NEXT: call void @may_jump()
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
-; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
-; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 256, i1 false)
+; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP30]]
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[HWASAN_UAR_TAG]], i64 256, i1 false)
; CHECK-NEXT: ret i1 [[RETVAL_0]]
;
entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
index 105ce5197fa6..9643a0de93ab 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
@@ -28,26 +28,25 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: br label [[TMP11:%.*]]
; X86-SCOPE: 11:
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
-; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: br i1 [[TMP13]], label [[TMP15:%.*]], label [[TMP11]]
-; X86-SCOPE: 15:
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]]
+; X86-SCOPE: 13:
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: ret i32 0
;
@@ -56,25 +55,24 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]]
-; X86-NOSCOPE: 12:
-; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]]
-; X86-NOSCOPE: 14:
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-NOSCOPE-NEXT: br label [[TMP11:%.*]]
+; X86-NOSCOPE: 11:
+; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]]
+; X86-NOSCOPE: 13:
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime(
@@ -82,50 +80,50 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]]
-; AARCH64-SCOPE: 25:
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]]
+; AARCH64-SCOPE: 26:
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP29]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP37:%.*]], label [[TMP25]]
-; AARCH64-SCOPE: 37:
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP36:%.*]], label [[TMP26]]
+; AARCH64-SCOPE: 36:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0
;
@@ -134,49 +132,49 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]]
; AARCH64-NOSCOPE: 30:
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
+; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP35]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime(
@@ -184,53 +182,53 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]]
-; AARCH64-SHORT-SCOPE: 25:
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP26:%.*]]
+; AARCH64-SHORT-SCOPE: 26:
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP29]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP32]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP32]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP39:%.*]], label [[TMP25]]
-; AARCH64-SHORT-SCOPE: 39:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP38:%.*]], label [[TMP26]]
+; AARCH64-SHORT-SCOPE: 38:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
@@ -239,52 +237,52 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP32:%.*]]
; AARCH64-SHORT-NOSCOPE: 32:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
; AARCH64-SHORT-NOSCOPE: 34:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP37]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
@@ -309,26 +307,25 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: br label [[TMP11:%.*]]
; X86-SCOPE: 11:
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
-; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: br i1 [[TMP13]], label [[TMP15:%.*]], label [[TMP11]]
-; X86-SCOPE: 15:
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]]
+; X86-SCOPE: 13:
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: ret i32 0
;
@@ -337,25 +334,24 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]]
-; X86-NOSCOPE: 12:
-; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]]
-; X86-NOSCOPE: 14:
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-NOSCOPE-NEXT: br label [[TMP11:%.*]]
+; X86-NOSCOPE: 11:
+; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]]
+; X86-NOSCOPE: 13:
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone(
@@ -363,50 +359,50 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]]
-; AARCH64-SCOPE: 25:
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]]
+; AARCH64-SCOPE: 26:
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP29]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP37:%.*]], label [[TMP25]]
-; AARCH64-SCOPE: 37:
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP36:%.*]], label [[TMP26]]
+; AARCH64-SCOPE: 36:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0
;
@@ -415,49 +411,49 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]]
; AARCH64-NOSCOPE: 30:
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
+; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP35]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone(
@@ -465,53 +461,53 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]]
-; AARCH64-SHORT-SCOPE: 25:
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP26:%.*]]
+; AARCH64-SHORT-SCOPE: 26:
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP29]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP32]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP32]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP39:%.*]], label [[TMP25]]
-; AARCH64-SHORT-SCOPE: 39:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP38:%.*]], label [[TMP26]]
+; AARCH64-SHORT-SCOPE: 38:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
@@ -520,52 +516,52 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP32:%.*]]
; AARCH64-SHORT-NOSCOPE: 32:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
; AARCH64-SHORT-NOSCOPE: 34:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP37]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
@@ -590,21 +586,20 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @multiple_lifetimes(
@@ -612,21 +607,20 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @multiple_lifetimes(
@@ -634,45 +628,45 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = and i64 [[TMP31]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP30]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = and i64 [[TMP30]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
+; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP32]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes(
@@ -680,45 +674,45 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = and i64 [[TMP31]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP30]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = and i64 [[TMP30]], 72057594037927935
+; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP32]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes(
@@ -726,48 +720,48 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes(
@@ -775,48 +769,48 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
@@ -837,28 +831,26 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
-; X86-SCOPE: 13:
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-SCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]]
+; X86-SCOPE: 12:
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-SCOPE-NEXT: ret i32 0
-; X86-SCOPE: 15:
-; X86-SCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-SCOPE: 13:
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @unreachable_exit(
@@ -866,27 +858,25 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
-; X86-NOSCOPE: 13:
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]]
+; X86-NOSCOPE: 12:
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
-; X86-NOSCOPE: 15:
-; X86-NOSCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-NOSCOPE: 13:
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @unreachable_exit(
@@ -894,56 +884,55 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
+; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP36:%.*]]
; AARCH64-SCOPE: 31:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
-; AARCH64-SCOPE: 37:
-; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; AARCH64-SCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
+; AARCH64-SCOPE: 36:
+; AARCH64-SCOPE-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
+; AARCH64-SCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP39]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @unreachable_exit(
@@ -951,55 +940,54 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
+; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP36:%.*]]
; AARCH64-NOSCOPE: 31:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
-; AARCH64-NOSCOPE: 37:
-; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
+; AARCH64-NOSCOPE: 36:
+; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
+; AARCH64-NOSCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP39]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit(
@@ -1007,59 +995,58 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP38:%.*]]
; AARCH64-SHORT-SCOPE: 33:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
-; AARCH64-SHORT-SCOPE: 39:
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE: 38:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP41]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit(
@@ -1067,58 +1054,57 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
+; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP38:%.*]]
; AARCH64-SHORT-NOSCOPE: 33:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
-; AARCH64-SHORT-NOSCOPE: 39:
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE: 38:
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP41]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
@@ -1141,32 +1127,30 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
-; X86-SCOPE: 13:
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-SCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]]
+; X86-SCOPE: 12:
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: br label [[TMP17:%.*]]
-; X86-SCOPE: 15:
-; X86-SCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]])
-; X86-SCOPE-NEXT: br label [[TMP17]]
-; X86-SCOPE: 17:
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: br label [[TMP14:%.*]]
+; X86-SCOPE: 13:
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]])
+; X86-SCOPE-NEXT: br label [[TMP14]]
+; X86-SCOPE: 14:
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @diamond_lifetime(
@@ -1174,27 +1158,26 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
-; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57
+; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
-; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP14:%.*]]
-; X86-NOSCOPE: 13:
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16)
+; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]]
+; X86-NOSCOPE: 12:
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: br label [[TMP15:%.*]]
+; X86-NOSCOPE-NEXT: br label [[TMP14:%.*]]
+; X86-NOSCOPE: 13:
+; X86-NOSCOPE-NEXT: br label [[TMP14]]
; X86-NOSCOPE: 14:
-; X86-NOSCOPE-NEXT: br label [[TMP15]]
-; X86-NOSCOPE: 15:
-; X86-NOSCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @diamond_lifetime(
@@ -1202,60 +1185,59 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
+; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP36:%.*]]
; AARCH64-SCOPE: 31:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: br label [[TMP43:%.*]]
-; AARCH64-SCOPE: 37:
-; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
-; AARCH64-SCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
-; AARCH64-SCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SCOPE-NEXT: br label [[TMP43]]
-; AARCH64-SCOPE: 43:
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP34]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: br label [[TMP41:%.*]]
+; AARCH64-SCOPE: 36:
+; AARCH64-SCOPE-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
+; AARCH64-SCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
+; AARCH64-SCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP39]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SCOPE-NEXT: br label [[TMP41]]
+; AARCH64-SCOPE: 41:
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @diamond_lifetime(
@@ -1263,37 +1245,38 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP32:%.*]]
; AARCH64-NOSCOPE: 31:
@@ -1302,12 +1285,11 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: br label [[TMP33]]
; AARCH64-NOSCOPE: 33:
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
+; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime(
@@ -1315,63 +1297,62 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP38:%.*]]
; AARCH64-SHORT-SCOPE: 33:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP45:%.*]]
-; AARCH64-SHORT-SCOPE: 39:
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP45]]
-; AARCH64-SHORT-SCOPE: 45:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP36]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP43:%.*]]
+; AARCH64-SHORT-SCOPE: 38:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP41]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]])
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP43]]
+; AARCH64-SHORT-SCOPE: 43:
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime(
@@ -1379,40 +1360,41 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP22]], [[TMP24]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP20]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP34:%.*]]
; AARCH64-SHORT-NOSCOPE: 33:
@@ -1421,12 +1403,11 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; AARCH64-SHORT-NOSCOPE: 34:
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP35]]
; AARCH64-SHORT-NOSCOPE: 35:
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP39]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP20]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP38]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
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