[PATCH] D149526: [JITLink][RISCV] Implement linker relaxation

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:589-592
+  } else if (Config.HasRVC && Config.IsRV32 && isInt<12>(Displace) && RD == 1) {
+    NewEdgeKind = R_RISCV_RVC_JUMP;
+    Aux.Writes.push_back(0x2001); // c.jal
+    Remove = 6;
----------------
Hahnfeld wrote:
> I'm probably missing something here: Why is this only possible in RV32?
C.JAL’s encoding means something else for RV64 (I think C.ADDIW but don’t remember for sure)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D149526/new/

https://reviews.llvm.org/D149526