[llvm] 644f0c0 - [X86] Update some stale comments. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 29 15:45:29 PDT 2023
Author: Craig Topper
Date: 2023-04-29T15:38:37-07:00
New Revision: 644f0c0faa5749abcc85c02ac3a5cbac380a9bec
URL: https://github.com/llvm/llvm-project/commit/644f0c0faa5749abcc85c02ac3a5cbac380a9bec
DIFF: https://github.com/llvm/llvm-project/commit/644f0c0faa5749abcc85c02ac3a5cbac380a9bec.diff
LOG: [X86] Update some stale comments. NFC
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0ff432f62945..04ca173b3b31 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1679,7 +1679,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);
}
- // This block controls legalization for 512-bit operations with 32/64 bit
+ // This block controls legalization for 512-bit operations with 8/16/32/64 bit
// elements. 512-bits can be disabled based on prefer-vector-width and
// required-vector-width function attributes.
if (!Subtarget.useSoftFloat() && Subtarget.useAVX512Regs()) {
@@ -2026,8 +2026,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
}
// This block control legalization of v32i1/v64i1 which are available with
- // AVX512BW. 512-bit v32i16 and v64i8 vector legalization is controlled with
- // useBWIRegs.
+ // AVX512BW..
if (!Subtarget.useSoftFloat() && Subtarget.hasBWI()) {
addRegisterClass(MVT::v32i1, &X86::VK32RegClass);
addRegisterClass(MVT::v64i1, &X86::VK64RegClass);
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