[llvm] 74e9318 - [RISCV] Disable strict node mutation and use correct lowering action of strict_fsetcc(s).

[Yeting Kuo via llvm-commits]

Author: Yeting Kuo
Date: 2023-04-29T11:53:07+08:00
New Revision: 74e931849e5d94c531958b456bd9210b8c3774d2

URL: https://github.com/llvm/llvm-project/commit/74e931849e5d94c531958b456bd9210b8c3774d2
DIFF: https://github.com/llvm/llvm-project/commit/74e931849e5d94c531958b456bd9210b8c3774d2.diff

LOG: [RISCV] Disable strict node mutation and use correct lowering action of strict_fsetcc(s).

The patch disables strict node mutation by setting IsStrictFPEnabled to true.
It also fixes wrong lowering action of strict_fsetcc(s).

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D149320

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 811b1bfe1a6f..8b95075105a8 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -635,6 +635,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
 
       setOperationAction(ISD::VECTOR_REVERSE, VT, Custom);
 
+      setOperationAction({ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS}, VT, Legal);
+
       setOperationPromotedToType(
           ISD::VECTOR_SPLICE, VT,
           MVT::getVectorVT(MVT::i8, VT.getVectorElementCount()));
@@ -894,8 +896,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
 
         setOperationAction(ISD::SETCC, VT, Custom);
 
-        setOperationAction({ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS}, VT,
-                           Legal);
+        if (VT.getVectorElementType() == MVT::i1)
+          setOperationAction({ISD::STRICT_FSETCC, ISD::STRICT_FSETCCS}, VT,
+                             Legal);
 
         setOperationAction(ISD::SELECT, VT, Custom);
 
@@ -1147,6 +1150,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
 
   setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
   setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
+
+  // Disable strict node mutation.
+  IsStrictFPEnabled = true;
 }
 
 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL,