[llvm] 24ca728 - [msan] Precommit test for regression from c55fffe

Vitaly Buka via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 28 16:27:05 PDT 2023


Author: Vitaly Buka
Date: 2023-04-28T16:26:50-07:00
New Revision: 24ca728dc60f5e136fa017c3611647d146ab88ed

URL: https://github.com/llvm/llvm-project/commit/24ca728dc60f5e136fa017c3611647d146ab88ed
DIFF: https://github.com/llvm/llvm-project/commit/24ca728dc60f5e136fa017c3611647d146ab88ed.diff

LOG: [msan] Precommit test for regression from c55fffe

Msan uses strict approach for unknown intrinsics like fpclass. So any
uninitialized bits in the value trigger msan report.

Added: 
    llvm/test/Instrumentation/MemorySanitizer/is-fpclass.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Instrumentation/MemorySanitizer/is-fpclass.ll b/llvm/test/Instrumentation/MemorySanitizer/is-fpclass.ll
new file mode 100644
index 0000000000000..3324cf0b0397d
--- /dev/null
+++ b/llvm/test/Instrumentation/MemorySanitizer/is-fpclass.ll
@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -passes=msan < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: sanitize_memory
+define i1 @not_isfinite_or_zero_f16(half %x) sanitize_memory {
+; CHECK-LABEL: @not_isfinite_or_zero_f16(
+; CHECK-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
+; CHECK-NEXT:    call void @llvm.donothing()
+; CHECK-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
+; CHECK-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0:![0-9]+]]
+; CHECK:       2:
+; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR4:[0-9]+]]
+; CHECK-NEXT:    unreachable
+; CHECK:       3:
+; CHECK-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 615)
+; CHECK-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; CHECK-NEXT:    ret i1 [[CLASS]]
+;
+  %class = call i1 @llvm.is.fpclass.f16(half %x, i32 615)
+  ret i1 %class
+}
+
+; Function Attrs: sanitize_memory
+define <2 x i1> @not_isfinite_or_zero_v2f16_pos0_neg0_vec(<2 x half> %x) sanitize_memory {
+; CHECK-LABEL: @not_isfinite_or_zero_v2f16_pos0_neg0_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
+; CHECK-NEXT:    call void @llvm.donothing()
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
+; CHECK-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT:    br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
+; CHECK:       3:
+; CHECK-NEXT:    call void @__msan_warning_noreturn() #[[ATTR4]]
+; CHECK-NEXT:    unreachable
+; CHECK:       4:
+; CHECK-NEXT:    [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 615)
+; CHECK-NEXT:    store <2 x i1> zeroinitializer, ptr @__msan_retval_tls, align 8
+; CHECK-NEXT:    ret <2 x i1> [[CLASS]]
+;
+  %class = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> %x, i32 615)
+  ret <2 x i1> %class
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare i1 @llvm.is.fpclass.f16(half, i32 immarg) #1
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare <2 x i1> @llvm.is.fpclass.v2f16(<2 x half>, i32 immarg) #1
+


        


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