[llvm] 2c9d21a - [VPlan] Turn Plan entry node into VPBasicBlock (NFCI).

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 28 04:29:25 PDT 2023


Author: Florian Hahn
Date: 2023-04-28T12:29:06+01:00
New Revision: 2c9d21a2a3593029213df9492b163195e631e491

URL: https://github.com/llvm/llvm-project/commit/2c9d21a2a3593029213df9492b163195e631e491
DIFF: https://github.com/llvm/llvm-project/commit/2c9d21a2a3593029213df9492b163195e631e491.diff

LOG: [VPlan] Turn Plan entry node into VPBasicBlock (NFCI).

The entry to the plan is the preheader of the vector loop and
guaranteed to be a VPBasicBlock. Make sure this is the case by
adjusting the type.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D149005

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/VPlan.cpp
    llvm/lib/Transforms/Vectorize/VPlan.h
    llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
    llvm/unittests/Transforms/Vectorize/VPlanTest.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp b/llvm/lib/Transforms/Vectorize/VPlan.cpp
index d0ffc2d5545a5..9e8ce60d2d9bd 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp
@@ -1133,7 +1133,7 @@ VPValue *vputils::getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr,
   if (auto *E = dyn_cast<SCEVUnknown>(Expr))
     return Plan.getVPValueOrAddLiveIn(E->getValue());
 
-  VPBasicBlock *Preheader = Plan.getEntry()->getEntryBasicBlock();
+  VPBasicBlock *Preheader = Plan.getEntry();
   VPExpandSCEVRecipe *Step = new VPExpandSCEVRecipe(Expr, SE);
   Preheader->appendRecipe(Step);
   return Step;

diff  --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h
index f4cd4d83f302b..45fc5041f9e55 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.h
+++ b/llvm/lib/Transforms/Vectorize/VPlan.h
@@ -2209,13 +2209,14 @@ class VPRegionBlock : public VPBlockBase {
 /// to produce efficient output IR, including which branches, basic-blocks and
 /// output IR instructions to generate, and their cost. VPlan holds a
 /// Hierarchical-CFG of VPBasicBlocks and VPRegionBlocks rooted at an Entry
-/// VPBlock.
+/// VPBasicBlock.
 class VPlan {
   friend class VPlanPrinter;
   friend class VPSlotTracker;
 
-  /// Hold the single entry to the Hierarchical CFG of the VPlan.
-  VPBlockBase *Entry;
+  /// Hold the single entry to the Hierarchical CFG of the VPlan, i.e. the
+  /// preheader of the vector loop.
+  VPBasicBlock *Entry;
 
   /// Holds the VFs applicable to this VPlan.
   SmallSetVector<ElementCount, 2> VFs;
@@ -2254,7 +2255,7 @@ class VPlan {
   MapVector<PHINode *, VPLiveOut *> LiveOuts;
 
 public:
-  VPlan(VPBlockBase *Entry = nullptr) : Entry(Entry) {
+  VPlan(VPBasicBlock *Entry = nullptr) : Entry(Entry) {
     if (Entry)
       Entry->setPlan(this);
   }
@@ -2269,10 +2270,10 @@ class VPlan {
   /// Generate the IR code for this VPlan.
   void execute(VPTransformState *State);
 
-  VPBlockBase *getEntry() { return Entry; }
-  const VPBlockBase *getEntry() const { return Entry; }
+  VPBasicBlock *getEntry() { return Entry; }
+  const VPBasicBlock *getEntry() const { return Entry; }
 
-  VPBlockBase *setEntry(VPBlockBase *Block) {
+  VPBasicBlock *setEntry(VPBasicBlock *Block) {
     Entry = Block;
     Block->setPlan(this);
     return Entry;

diff  --git a/llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp b/llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
index d336e17898761..1e5d60b864c37 100644
--- a/llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
+++ b/llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
@@ -15,6 +15,8 @@ namespace llvm {
 namespace {
 
 TEST(VPDominatorTreeTest, DominanceNoRegionsTest) {
+  //   VPBB0
+  //    |
   //   R1 {
   //     VPBB1
   //     /   \
@@ -22,6 +24,7 @@ TEST(VPDominatorTreeTest, DominanceNoRegionsTest) {
   //    \    /
   //    VPBB4
   //  }
+  VPBasicBlock *VPBB0 = new VPBasicBlock("VPBB0");
   VPBasicBlock *VPBB1 = new VPBasicBlock("VPBB1");
   VPBasicBlock *VPBB2 = new VPBasicBlock("VPBB2");
   VPBasicBlock *VPBB3 = new VPBasicBlock("VPBB3");
@@ -30,13 +33,14 @@ TEST(VPDominatorTreeTest, DominanceNoRegionsTest) {
   VPBB2->setParent(R1);
   VPBB3->setParent(R1);
 
+  VPBlockUtils::connectBlocks(VPBB0, R1);
   VPBlockUtils::connectBlocks(VPBB1, VPBB2);
   VPBlockUtils::connectBlocks(VPBB1, VPBB3);
   VPBlockUtils::connectBlocks(VPBB2, VPBB4);
   VPBlockUtils::connectBlocks(VPBB3, VPBB4);
 
   VPlan Plan;
-  Plan.setEntry(R1);
+  Plan.setEntry(VPBB0);
   VPDominatorTree VPDT;
   VPDT.recalculate(Plan);
 
@@ -68,6 +72,8 @@ checkDomChildren(VPDominatorTree &VPDT, VPBlockBase *Src,
 TEST(VPDominatorTreeTest, DominanceRegionsTest) {
   {
     // 2 consecutive regions.
+    // VPBB0
+    //  |
     // R1 {
     //     \
     //     R1BB1     _
@@ -84,6 +90,7 @@ TEST(VPDominatorTreeTest, DominanceRegionsTest) {
     //    R2BB2
     // }
     //
+    VPBasicBlock *VPBB0 = new VPBasicBlock("VPBB0");
     VPBasicBlock *R1BB1 = new VPBasicBlock();
     VPBasicBlock *R1BB2 = new VPBasicBlock();
     VPBasicBlock *R1BB3 = new VPBasicBlock();
@@ -91,6 +98,7 @@ TEST(VPDominatorTreeTest, DominanceRegionsTest) {
     VPRegionBlock *R1 = new VPRegionBlock(R1BB1, R1BB4, "R1");
     R1BB2->setParent(R1);
     R1BB3->setParent(R1);
+    VPBlockUtils::connectBlocks(VPBB0, R1);
     VPBlockUtils::connectBlocks(R1BB1, R1BB2);
     VPBlockUtils::connectBlocks(R1BB1, R1BB3);
     VPBlockUtils::connectBlocks(R1BB2, R1BB4);
@@ -105,7 +113,7 @@ TEST(VPDominatorTreeTest, DominanceRegionsTest) {
     VPBlockUtils::connectBlocks(R1, R2);
 
     VPlan Plan;
-    Plan.setEntry(R1);
+    Plan.setEntry(VPBB0);
     VPDominatorTree VPDT;
     VPDT.recalculate(Plan);
 

diff  --git a/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp b/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
index 606d8d03fc63f..dbf03693e9f5c 100644
--- a/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+++ b/llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
@@ -263,20 +263,6 @@ TEST(VPBasicBlockTest, getPlan) {
     EXPECT_EQ(&Plan, VPBB4->getPlan());
   }
 
-  {
-    // Region block is entry into VPlan.
-    VPBasicBlock *R1BB1 = new VPBasicBlock();
-    VPBasicBlock *R1BB2 = new VPBasicBlock();
-    VPRegionBlock *R1 = new VPRegionBlock(R1BB1, R1BB2, "R1");
-    VPBlockUtils::connectBlocks(R1BB1, R1BB2);
-
-    VPlan Plan;
-    Plan.setEntry(R1);
-    EXPECT_EQ(&Plan, R1->getPlan());
-    EXPECT_EQ(&Plan, R1BB1->getPlan());
-    EXPECT_EQ(&Plan, R1BB2->getPlan());
-  }
-
   {
     // VPBasicBlock is the entry into the VPlan, followed by a region.
     VPBasicBlock *R1BB1 = new VPBasicBlock();
@@ -359,6 +345,8 @@ TEST(VPBasicBlockTest, TraversingIteratorTest) {
 
   {
     // 2 consecutive regions.
+    // VPBB0
+    //  |
     // R1 {
     //     \
     //     R1BB1
@@ -374,6 +362,7 @@ TEST(VPBasicBlockTest, TraversingIteratorTest) {
     //      |
     //    R2BB2
     //
+    VPBasicBlock *VPBB0 = new VPBasicBlock("VPBB0");
     VPBasicBlock *R1BB1 = new VPBasicBlock();
     VPBasicBlock *R1BB2 = new VPBasicBlock();
     VPBasicBlock *R1BB3 = new VPBasicBlock();
@@ -381,6 +370,7 @@ TEST(VPBasicBlockTest, TraversingIteratorTest) {
     VPRegionBlock *R1 = new VPRegionBlock(R1BB1, R1BB4, "R1");
     R1BB2->setParent(R1);
     R1BB3->setParent(R1);
+    VPBlockUtils::connectBlocks(VPBB0, R1);
     VPBlockUtils::connectBlocks(R1BB1, R1BB2);
     VPBlockUtils::connectBlocks(R1BB1, R1BB3);
     VPBlockUtils::connectBlocks(R1BB2, R1BB4);
@@ -449,7 +439,7 @@ TEST(VPBasicBlockTest, TraversingIteratorTest) {
 
     // Use Plan to properly clean up created blocks.
     VPlan Plan;
-    Plan.setEntry(R1);
+    Plan.setEntry(VPBB0);
   }
 
   {


        


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