[llvm] 4cd1b67 - [ValueTracking] Add logic for `fshl/fshr(A, B, C) != 0` if `A == B && A ! = 0`

[Noah Goldstein via llvm-commits]

Author: Noah Goldstein
Date: 2023-04-28T01:57:37-05:00
New Revision: 4cd1b67491df2fc927057feb567db8e418e28d80

URL: https://github.com/llvm/llvm-project/commit/4cd1b67491df2fc927057feb567db8e418e28d80
DIFF: https://github.com/llvm/llvm-project/commit/4cd1b67491df2fc927057feb567db8e418e28d80.diff

LOG: [ValueTracking] Add logic for `fshl/fshr(A, B, C) != 0` if `A == B && A ! = 0`

Having `A == B` is quite common for rotate patterns.

Alive2 Links:
    - https://alive2.llvm.org/ce/z/mPXi9c
    - https://alive2.llvm.org/ce/z/UfDHoI

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D149372

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Analysis/ValueTracking/known-non-zero.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index c36bb35561f0c..57a65338b8921 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2894,6 +2894,12 @@ bool isKnownNonZero(const Value *V, const APInt &DemandedElts, unsigned Depth,
             isKnownNonZero(II->getArgOperand(1), DemandedElts, Depth, Q))
           return true;
         break;
+      case Intrinsic::fshr:
+      case Intrinsic::fshl:
+        // If Op0 == Op1, this is a rotate. rotate(x, y) != 0 iff x != 0.
+        if (II->getArgOperand(0) == II->getArgOperand(1))
+          return isKnownNonZero(II->getArgOperand(0), DemandedElts, Depth, Q);
+        break;
       case Intrinsic::vscale:
         return true;
       default:

diff  --git a/llvm/test/Analysis/ValueTracking/known-non-zero.ll b/llvm/test/Analysis/ValueTracking/known-non-zero.ll
index ccb82b2449ef6..c6ea1ed7c7ef3 100644
--- a/llvm/test/Analysis/ValueTracking/known-non-zero.ll
+++ b/llvm/test/Analysis/ValueTracking/known-non-zero.ll
@@ -532,10 +532,7 @@ define i1 @fshr_non_zero(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @fshr_non_zero(
 ; CHECK-NEXT:    [[PRED0:%.*]] = icmp ne i8 [[X:%.*]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRED0]])
-; CHECK-NEXT:    [[V:%.*]] = tail call i8 @llvm.fshr.i8(i8 [[X]], i8 [[X]], i8 [[Y:%.*]])
-; CHECK-NEXT:    [[OR:%.*]] = or i8 [[V]], [[Z:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[OR]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %pred0 = icmp ne i8 %x, 0
   call void @llvm.assume(i1 %pred0)
@@ -570,10 +567,7 @@ define i1 @fshl_non_zero(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @fshl_non_zero(
 ; CHECK-NEXT:    [[PRED0:%.*]] = icmp ne i8 [[X:%.*]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRED0]])
-; CHECK-NEXT:    [[V:%.*]] = tail call i8 @llvm.fshl.i8(i8 [[X]], i8 [[X]], i8 [[Y:%.*]])
-; CHECK-NEXT:    [[OR:%.*]] = or i8 [[V]], [[Z:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[OR]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %pred0 = icmp ne i8 %x, 0
   call void @llvm.assume(i1 %pred0)