[PATCH] D146915: Implement TypeSig generator in `Intrinsics.td`

[NAKAMURA Takumi via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG91b80ce417c9: TableGen: Implement TypeSig generator in `Intrinsics.td` (authored by chapuni).

Changed prior to commit:
  https://reviews.llvm.org/D146915?vs=516807&id=517173#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146915/new/

https://reviews.llvm.org/D146915

Files:
  llvm/include/llvm/IR/Intrinsics.td
  llvm/utils/TableGen/CodeGenIntrinsics.cpp
  llvm/utils/TableGen/IntrinsicEmitter.cpp

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