[llvm] 12cd7e1 - [RISCV] Remove one use restriction on the scalar from combineBinOpToReduce.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-04-25T21:10:58-07:00
New Revision: 12cd7e11aad01ba0ff35d76707ba956b2fb14e8b

URL: https://github.com/llvm/llvm-project/commit/12cd7e11aad01ba0ff35d76707ba956b2fb14e8b
DIFF: https://github.com/llvm/llvm-project/commit/12cd7e11aad01ba0ff35d76707ba956b2fb14e8b.diff

LOG: [RISCV] Remove one use restriction on the scalar from combineBinOpToReduce.

If multiple reductions use the neutral start value, this prevented
us from optimizing any of them.

This increases the number of scalar->vector operations but reduces
the number of scalar operations.

Note, we were already inconsistent about the one use check when we
peeked through INSERT_SUBVECTORs.

Reviewed By: fakepaper56

Differential Revision: https://reviews.llvm.org/D149181

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index efe14933e9297..7b1259a2b8529 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -9208,9 +9208,6 @@ static SDValue combineBinOpToReduce(SDNode *N, SelectionDAG &DAG,
                          0))
     return SDValue();
 
-  if (!ScalarV.hasOneUse())
-    return SDValue();
-
   // If the AVL is zero, operand 0 will be returned. So it's not safe to fold.
   // FIXME: We might be able to improve this if operand 0 is undef.
   if (!isNonZeroAVL(Reduce.getOperand(5)))

diff  --git a/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll b/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
index 058263f01d5f2..5c769bc126ba0 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
@@ -282,13 +282,12 @@ define float @reduce_fadd4(float %x, float %y, <4 x float> %v, <4 x float> %w) {
 ; CHECK-LABEL: reduce_fadd4:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
-; CHECK-NEXT:    vmv.s.x v10, zero
+; CHECK-NEXT:    vfmv.s.f v10, fa0
 ; CHECK-NEXT:    vfredusum.vs v8, v8, v10
 ; CHECK-NEXT:    vfmv.f.s fa5, v8
-; CHECK-NEXT:    vfredusum.vs v8, v9, v10
+; CHECK-NEXT:    vfmv.s.f v8, fa1
+; CHECK-NEXT:    vfredusum.vs v8, v9, v8
 ; CHECK-NEXT:    vfmv.f.s fa4, v8
-; CHECK-NEXT:    fadd.s fa5, fa5, fa0
-; CHECK-NEXT:    fadd.s fa4, fa4, fa1
 ; CHECK-NEXT:    fdiv.s fa0, fa5, fa4
 ; CHECK-NEXT:    ret
 entry: