[PATCH] D149080: [AMDGPU] Fix negative offset values interpretation in getMemOperandsWithOffset for DS

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/triv-disjoint-mem-access-neg-offset.mir:78-123
+  - { reg: '$sgpr0_sgpr1', virtual-reg: '%1' }
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
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Can use -simplify-mir (which really should be the default)


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Comment at: llvm/test/CodeGen/AMDGPU/triv-disjoint-mem-access-neg-offset.mir:149
+    %8:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    DS_WRITE_B128_gfx9 %8, killed %6, 512, 0, implicit $exec :: (store (s128) into `ptr addrspace(3) getelementptr (%llvm.amdgcn.kernel.no_reorder_flat_load_local_store_local_load.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.no_reorder_flat_load_local_store_local_load.lds, i32 128, i32 0)`, addrspace 3)
+    %9:vreg_64 = DS_READ2_B32_gfx9 %8, -127, -126, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) getelementptr (%llvm.amdgcn.kernel.no_reorder_flat_load_local_store_local_load.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.no_reorder_flat_load_local_store_local_load.lds, i32 129, i32 0)`, align 4, addrspace 3)
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I don't think you really need the IR references (and then you could drop the whole IR section)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D149080/new/

https://reviews.llvm.org/D149080