[PATCH] D148957: [AMDGPU] Add intrinsics for converting global pointers to resources
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 25 13:53:52 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:4395
+bool AMDGPULegalizerInfo::legalizePointerAsRsrcIntrin(
+ MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B) const {
+ Register Result = MI.getOperand(0).getReg();
----------------
krzysz00 wrote:
> gandhi21299 wrote:
> > Might be helpful to have an assertion on the number of operands of `MI`. Is it possible that any of the operands is not a register?
> From what I can tell of all the surrounding code ... no?
Only if any operands are immarg, which they aren't (IIRC this was a MachineVerifier check which is missing)
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148957/new/
https://reviews.llvm.org/D148957
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