[PATCH] D138323: [TableGen] RegisterInfo backend - Add abstraction layer between code generation logic and syntax output

[Rot127 via Phabricator via llvm-commits]

Rot127 added a comment.

Since LLVM16 is now released, I wondered if anyone has more comments regarding my proposals to untangle the emitters.
Because if anyone sees this as useful I would be happy to sum up the discussion here and move it into the forum.

@nhaehnle I assume this revision will not be accepted?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138323/new/

https://reviews.llvm.org/D138323