[PATCH] D132819: [RISCV] Add MC support of RISCV zcmp Extension

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:2408
+
+OperandMatchResultTy RISCVAsmParser::parseZcSpimm(OperandVector &Operands) {
+  if (getLexer().is(AsmToken::Minus))
----------------
`parseZcSpimm` -> `parseZcmpSpimm`


================
Comment at: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:477
 
+static DecodeStatus decodeZcRlist(MCInst &Inst, unsigned Imm, uint64_t Address,
+                                  const void *Decoder) {
----------------
decodeZcRlist -> decodeZcmpRlist


================
Comment at: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:486
+// spimm is based on rlist now.
+static DecodeStatus decodeZcSpimm(MCInst &Inst, unsigned Imm, uint64_t Address,
+                                  const void *Decoder) {
----------------
decodeZcSpimm -> decodeZcmpSpimm


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132819/new/

https://reviews.llvm.org/D132819