[PATCH] D147610: [RISCV][MC] Add support for experimental Zfbfmin extension

[Jun Sha via Phabricator via llvm-commits]

joshua-arch1 added a comment.

I'm wondering whether it is appropriate to just use FPR16 for the destination of fcvt.bf16.s? The destination is in BF16 format instead of simple FP16.  Your implemention looks like just replacing fcvt.h.s with fcvt.bf16.s. Do we need to define a new register class?


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https://reviews.llvm.org/D147610