[llvm] 00a04de - [RISCV] Rename WriteFCvtF32ToF32 sched class to WriteFRoundF32.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-04-24T12:02:53-07:00
New Revision: 00a04de2edf713232bb7907693daa8159285295d

URL: https://github.com/llvm/llvm-project/commit/00a04de2edf713232bb7907693daa8159285295d
DIFF: https://github.com/llvm/llvm-project/commit/00a04de2edf713232bb7907693daa8159285295d.diff

LOG: [RISCV] Rename WriteFCvtF32ToF32 sched class to WriteFRoundF32.

Round better matches the instructions this is used for.

Do the same for F16 and F64 as well as the Read classes.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    llvm/lib/Target/RISCV/RISCVSchedule.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
index fb2aa1bf0ef7..81333172c312 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
@@ -94,9 +94,9 @@ def FMAXM_S: FPALU_rr<0b0010100, 0b011, "fmaxm.s", FPR32, /*Commutable*/ 1>;
 }
 
 def FROUND_S : FPUnaryOp_r_frm<0b0100000, 0b00100, FPR32, FPR32, "fround.s">,
-               Sched<[WriteFCvtF32ToF32, ReadFCvtF32ToF32]>;
+               Sched<[WriteFRoundF32, ReadFRoundF32]>;
 def FROUNDNX_S : FPUnaryOp_r_frm<0b0100000, 0b00101, FPR32, FPR32, "froundnx.s">,
-                 Sched<[WriteFCvtF32ToF32, ReadFCvtF32ToF32]>;
+                 Sched<[WriteFRoundF32, ReadFRoundF32]>;
 
 let SchedRW = [WriteFCmp32, ReadFCmp32, ReadFCmp32] in {
 def FLTQ_S : FPCmp_rr<0b1010000, 0b101, "fltq.s", FPR32>;
@@ -116,9 +116,9 @@ def FMAXM_D: FPALU_rr<0b0010101, 0b011, "fmaxm.d", FPR64, /*Commutable*/ 1>;
 }
 
 def FROUND_D : FPUnaryOp_r_frm<0b0100001, 0b00100, FPR64, FPR64, "fround.d">,
-               Sched<[WriteFCvtF64ToF64, ReadFCvtF64ToF64]>;
+               Sched<[WriteFRoundF64, ReadFRoundF64]>;
 def FROUNDNX_D : FPUnaryOp_r_frm<0b0100001, 0b00101, FPR64, FPR64, "froundnx.d">,
-                 Sched<[WriteFCvtF64ToF64, ReadFCvtF64ToF64]>;
+                 Sched<[WriteFRoundF64, ReadFRoundF64]>;
 
 def FCVTMOD_W_D
     : FPUnaryOp_r_rtz<0b1100001, 0b01000, GPR, FPR64, "fcvtmod.w.d">,
@@ -157,9 +157,9 @@ def FMAXM_H: FPALU_rr<0b0010110, 0b011, "fmaxm.h", FPR16, /*Commutable*/ 1>;
 }
 
 def FROUND_H : FPUnaryOp_r_frm<0b0100010, 0b00100, FPR16, FPR16, "fround.h">,
-               Sched<[WriteFCvtF16ToF16, ReadFCvtF16ToF16]>;
+               Sched<[WriteFRoundF16, ReadFRoundF16]>;
 def FROUNDNX_H : FPUnaryOp_r_frm<0b0100010, 0b00101, FPR16, FPR16, "froundnx.h">,
-                 Sched<[WriteFCvtF16ToF16, ReadFCvtF16ToF16]>;
+                 Sched<[WriteFRoundF16, ReadFRoundF16]>;
 
 let SchedRW = [WriteFCmp16, ReadFCmp16, ReadFCmp16] in {
 def FLTQ_H : FPCmp_rr<0b1010010, 0b101, "fltq.h", FPR16>;

diff  --git a/llvm/lib/Target/RISCV/RISCVSchedule.td b/llvm/lib/Target/RISCV/RISCVSchedule.td
index c345d835b53e..62244a99a90d 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedule.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedule.td
@@ -76,9 +76,11 @@ def WriteFCvtF16ToF32  : SchedWrite;
 def WriteFCvtF32ToF16  : SchedWrite;
 def WriteFCvtF16ToF64  : SchedWrite;
 def WriteFCvtF64ToF16  : SchedWrite;
-def WriteFCvtF32ToF32  : SchedWrite;
-def WriteFCvtF64ToF64  : SchedWrite;
-def WriteFCvtF16ToF16  : SchedWrite;
+
+// Zfa found instructions.
+def WriteFRoundF32     : SchedWrite;
+def WriteFRoundF64     : SchedWrite;
+def WriteFRoundF16     : SchedWrite;
 
 def WriteFClass16   : SchedWrite;    // 16-bit floating point classify
 def WriteFClass32   : SchedWrite;    // 32-bit floating point classify
@@ -189,9 +191,9 @@ def ReadFCvtF16ToF32     : SchedRead;
 def ReadFCvtF32ToF16     : SchedRead;
 def ReadFCvtF16ToF64     : SchedRead;
 def ReadFCvtF64ToF16     : SchedRead;
-def ReadFCvtF32ToF32     : SchedRead;
-def ReadFCvtF64ToF64     : SchedRead;
-def ReadFCvtF16ToF16     : SchedRead;
+def ReadFRoundF16        : SchedRead;
+def ReadFRoundF32        : SchedRead;
+def ReadFRoundF64        : SchedRead;
 def ReadFClass16         : SchedRead;
 def ReadFClass32         : SchedRead;
 def ReadFClass64         : SchedRead;
@@ -252,16 +254,16 @@ def : ReadAdvance<ReadSFB, 0>;
 
 multiclass UnsupportedSchedZfa {
 let Unsupported = true in {
-def : WriteRes<WriteFCvtF32ToF32, []>;
-def : WriteRes<WriteFCvtF64ToF64, []>;
-def : WriteRes<WriteFCvtF16ToF16, []>;
+def : WriteRes<WriteFRoundF16, []>;
+def : WriteRes<WriteFRoundF32, []>;
+def : WriteRes<WriteFRoundF64, []>;
 def : WriteRes<WriteFLI16, []>;
 def : WriteRes<WriteFLI32, []>;
 def : WriteRes<WriteFLI64, []>;
 
-def : ReadAdvance<ReadFCvtF32ToF32, 0>;
-def : ReadAdvance<ReadFCvtF64ToF64, 0>;
-def : ReadAdvance<ReadFCvtF16ToF16, 0>;
+def : ReadAdvance<ReadFRoundF32, 0>;
+def : ReadAdvance<ReadFRoundF64, 0>;
+def : ReadAdvance<ReadFRoundF16, 0>;
 } // Unsupported = true
 }