[PATCH] D149083: [PowerPC] Optimize VPERM and fix code order for swapping vector operands on LE

[Maryam Moghadas via Phabricator via llvm-commits]

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This patch reverts commit 7614ba0a5db8 <https://reviews.llvm.org/rG7614ba0a5db8a3503dfec8b0450bcdef1d0d5929> to optimize VPERM when one of its
vector operands is XXSWAPD, similar to XXPERM. It also reorganizes the
little-endian swap code on LE, swapping the vector operand after
adjusting the mask operand. This ensures that the vector operand is
swapped at the correct point in the code, resulting in a valid
constant pool for the mask operand.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D149083

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/ppc-shufflevector-combine.ll
  llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
  llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
  llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
  llvm/test/CodeGen/PowerPC/vec-itofp.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/vperm-swap.ll
  llvm/test/CodeGen/PowerPC/xxperm-swap.ll

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