[PATCH] D148942: [PowerPC] Add a new test for vperm with a swapped vector operand and a constant pool
Maryam Moghadas via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 24 08:41:37 PDT 2023
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe5de760c314c: [PowerPC] Add a new test for vperm with a swapped vector operand and a constant… (authored by maryammo).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148942/new/
https://reviews.llvm.org/D148942
Files:
llvm/test/CodeGen/PowerPC/vperm-swap.ll
Index: llvm/test/CodeGen/PowerPC/vperm-swap.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/vperm-swap.ll
@@ -0,0 +1,39 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
+; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
+; RUN: FileCheck %s --check-prefix=CHECK-LE-P8
+
+define <16 x i8> @test_none_v16i8(i8 %arg, ptr nocapture noundef readonly %b) {
+; CHECK-LE-P8: .LCPI0_0:
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 30 # 0x1e
+; CHECK-LE-P8-NEXT: .byte 7 # 0x7
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-NEXT: .byte 31 # 0x1f
+; CHECK-LE-P8-LABEL: test_none_v16i8:
+; CHECK-LE-P8: # %bb.0: # %entry
+; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI0_0 at toc@ha
+; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
+; CHECK-LE-P8-NEXT: mtvsrd v4, r3
+; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI0_0 at toc@l
+; CHECK-LE-P8-NEXT: lxvd2x vs1, 0, r5
+; CHECK-LE-P8-NEXT: xxswapd v2, vs0
+; CHECK-LE-P8-NEXT: xxswapd v3, vs1
+; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
+; CHECK-LE-P8-NEXT: blr
+entry:
+ %lhs = load <16 x i8>, ptr %b, align 4
+ %rhs = insertelement <16 x i8> undef, i8 %arg, i32 0
+ %shuffle = shufflevector <16 x i8> %lhs, <16 x i8> %rhs, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ ret <16 x i8> %shuffle
+}
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