[PATCH] D149001: [InstSimplify] sdiv a (1 srem b) --> a

Zhu Siyuan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 24 05:17:53 PDT 2023


floatshadow added inline comments.


================
Comment at: llvm/lib/Analysis/InstructionSimplify.cpp:1059
+  KnownBits Known = computeKnownBits(Op1, Q.DL, 0, Q.AC, Q.CxtI, Q.DT);
+  if (Known.countMinLeadingZeros() >= Known.getBitWidth() - 1)
     return IsDiv ? Op0 : Constant::getNullValue(Ty);
----------------
nikic wrote:
> I'd feel better about a `==` here.
`==` is better. Thanks for the suggestion.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149001/new/

https://reviews.llvm.org/D149001



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