[PATCH] D134599: [RISCV] Add CodeGen support of RISCV zcmp Extension

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:186
 
+// Registers saveable by PUSH instruction in Zce extension
+def PGPR : RegisterClass<"RISCV", [XLenVT], 32, (add
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Zcmp?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134599/new/

https://reviews.llvm.org/D134599