[PATCH] D148948: [RISCV][Docs] Tweak the note about zicsr and zifencei since we now support version 2.1 of the base I specification.

[Craig Topper via Phabricator via llvm-commits]

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https://reviews.llvm.org/D148948

Files:
  llvm/docs/RISCVUsage.rst


Index: llvm/docs/RISCVUsage.rst
===================================================================
--- llvm/docs/RISCVUsage.rst
+++ llvm/docs/RISCVUsage.rst
@@ -166,7 +166,7 @@
 .. _riscv-i2p1-note:
 
 ``zicsr``, ``zifencei``
-  Between versions 2.0 and 2.1 of the base I specification, a backwards incompatible change was made to remove selected instructions and CSRs from the base ISA.  These instructions were grouped into a set of new extensions, but were no longer required by the base ISA.  This change is described in "Preface to Document Version 20190608-Base-Ratified" from the specification document.  LLVM currently implements version 2.0 of the base specification.  Thus, instructions from these extensions are accepted as part of the base ISA.  LLVM also allows the explicit specification of the extensions in an march string.
+  Between versions 2.0 and 2.1 of the base I specification, a backwards incompatible change was made to remove selected instructions and CSRs from the base ISA.  These instructions were grouped into a set of new extensions, but were no longer required by the base ISA.  This change is described in "Preface to Document Version 20190608-Base-Ratified" from the specification document.  LLVM currently implements version 2.1 of the base specification. To maintain compatibility, instructions from these extensions are accepted without being in the march string.  LLVM also allows the explicit specification of the extensions in an march string.
 
 Experimental Extensions
 =======================


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