[PATCH] D148929: [mlir][test][Integration] Refactor Arm emulator configuration

Cullen Rhodes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 21 08:33:27 PDT 2023


c-rhodes created this revision.
c-rhodes added reviewers: awarzynski, aartbik.
c-rhodes added a project: MLIR.
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c-rhodes requested review of this revision.
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Herald added a reviewer: dcaballe.

The logic enabling the Arm SVE (and now SME) integration tests for
various dialects, that may run under emulation, is now duplicated in
several places.

This patch moves the configuration to the top-level MLIR integration
tests Lit config and renames the '%lli' substitution in contexts where
it will run exclusively (ArmSVE, ArmSME) on AArch64 (and possibly under
emulation) to '%lli_aarch64_cmd', and '%lli_host_or_aarch64_cmd' for
contexts where it will run on the host OR AArch64 (also possibly under
emulation). The latter is for integration tests that have
target-specific and target-agnostic codepaths such as SparseTensor,
which supports scalable vectors.

The two substitutions have the same effect but the names are different to
convey this information. The '%lli_aarch64_cmd' substitution could be
used in the SparseTensor tests but that would be a misnomer if the host
were x86 and the MLIR_RUN_SVE_TESTS=OFF.

The reason for renaming the '%lli' substitution is to not prevent running other
target-specific integration tests at the same time, since the same substitution
'%lli' is used for lli in other integration tests:

- mlir/test/Integration/Dialect/Vector/CPU/X86Vector              - (AVX emulation via Intel SDE)
- mlir/test/Integration/Dialect/Vector/CPU/AMX                    - (AMX emulation via Intel SDE)
- mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir - (RISCV emulation via QEMU if supported, native otherwise)

and substituting '%lli' at the top-level with Arm specific logic would override
this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148929

Files:
  mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_0_permute.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1_permute.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_f16.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_abs.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_cast.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_dim.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_collapse_shape.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex32.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex64.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_complex_ops.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_constant_to_sparse_tensor.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nhwc_hwcf.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_dyn.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_element.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_ptr.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_coo_test.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dot.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_expand_shape.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_file_io.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_filter_conv2d.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_index_dense.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_1d.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_2d.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_insert_3d.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matmul.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matrix_ops.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_mult_elt.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_quantized_matmul.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_re_im.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reduce_custom.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reductions.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_push_back.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_mm_fusion.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scale.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_scf_nested.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_select.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sign.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_storage.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_c32.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_f16.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_mul.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tensor_ops.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose_coo.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
  mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir
  mlir/test/Integration/Dialect/Vector/CPU/ArmSME/lit.local.cfg
  mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
  mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg
  mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
  mlir/test/Integration/lit.local.cfg

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