[PATCH] D142782: [AMDGPU] Add basic support for extended i8 perm matching

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:9990
+    // question
+    if (Index >= NarrowByteWidth)
+      return L->getExtensionType() == ISD::ZEXTLOAD
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Braces


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10045
+
+  auto Addresses16Bits = [](int Mask) {
+    int Low8 = Mask & 0xff;
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Can this be a separate function? It's a lambda that doesn't capture anything 


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:10031
+          ExtType == ISD::EXTLOAD) {
+        return L->getMemoryVT().getSizeInBits() == 16;
+      }
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arsenm wrote:
> Need to make sure this is scalar
This isn't checking for a scalar type?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142782/new/

https://reviews.llvm.org/D142782